Flash Memory Common Source Line Voltage Compensation
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Solution Overview
Problem
Flash memory devices suffer from malfunctions due to noise voltage on the common source line, leading to erroneous reading of memory cells as programmed when they are not, caused by parasitic resistance and varying current flows, which affects threshold voltage distribution and program verification accuracy.
Innovation Solution
A common source line compensation circuit generates a compensated bias voltage based on the common source line voltage and memory cell addresses, reducing the impact of parasitic resistance and noise by adjusting the voltage applied to bit lines or word lines, ensuring accurate program verification and read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory cells are connected in series between bit line and common source line to increase integration density, then the degree of integration is improved, but noise voltage on the common source line increases causing malfunction
Solution Approach 1:
A compensation circuit is introduced as an intermediary between the common source line and the memory cell array. This circuit includes a detector that senses noise voltage on the common source line and a compensation unit that generates counter-voltages to cancel the noise, thereby protecting the memory cells from malfunction while maintaining the high-density series connection structure
Solution Approach 2:
The compensation circuit implements a feedback mechanism where the detector continuously monitors the common source line voltage and feeds this information to the compensation unit. The compensation unit dynamically adjusts the compensation voltage based on the detected noise level, creating a closed-loop system that actively suppresses noise voltage fluctuations
2Measurement precision
If common source line compensation circuit is added to reduce noise voltage impact, then program verification accuracy is improved, but device complexity increases
Solution Approach 1:
The compensation circuit is segmented into distinct functional modules: a noise detector unit that senses voltage fluctuations on the common source line, and a compensation unit that generates counter-voltages. This segmentation allows each module to perform its specific function efficiently while keeping the overall circuit design manageable and systematic
Solution Approach 2:
The compensation circuit is designed to automatically detect and compensate for noise voltage without requiring external intervention or complex control logic. The detector self-monitors the common source line condition and triggers the compensation unit to generate appropriate counter-voltages, enabling the system to self-correct noise-induced errors
Data Source
AI summary
A memory device includes a plurality of memory cells serially connected between a bit line and a common source line and a plurality of word lines, respective ones of which are connected to respective gates of the plurality of memory cells. The memory device further includes a common source line compensation circuit configured to generate a compensated bias voltage on the bit line or at least one of the plurality of word lines responsive to a common source line voltage on the common source line. Related methods of operating memory devices are also provided.