Flash Memory Characterization Using CMOS Switch Synchronization
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Solution Overview
Problem
Conventional characterization systems for NOR-type flash memory cells face challenges in accurately measuring endurance due to relaxation of the memory cell and voltage peaks during switching, leading to distorted measurements and unreliable reliability analysis.
Innovation Solution
A characterization system utilizing a CMOS-type switch to connect the gate electrode of the floating-gate transistor to both the voltage generator and dynamic measurement device, allowing synchronized switching between write, erase, and read operations without interruption, and a dynamic measurement device to measure currents during these operations, ensuring precise and distortion-free measurements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If electromechanical switches are used to connect the gate electrode to voltage generator and measurement device, then switching between operations can be achieved, but voltage peaks are generated during switching and measurement distortion occurs
Solution Approach 1:
The patent replaces electromechanical switches with electronic switching circuits that use transistors (MOSFETs or BJTs) controlled by control signals. This substitution eliminates the mechanical contact and magnetic field issues of electromechanical switches, preventing voltage peaks and measurement distortion while maintaining the ability to switch between voltage generator and measurement device connections.
Solution Approach 2:
The patent introduces controlled transistor switching elements as intermediaries between the gate electrode and the external devices. These transistors act as electronic switches that can rapidly transition between on and off states without generating voltage peaks, thereby mediating the connection between the memory cell and testing equipment without distorting measurements.
2Measurement precision
If switching time between operations is reduced to prevent memory cell relaxation, then measurement accuracy improves, but switch response time becomes the limiting factor
Solution Approach 1:
The patent replaces slow electromechanical switches with fast electronic transistor switches that can transition between states in nanoseconds or microseconds. This electronic switching mechanism is orders of magnitude faster than electromechanical alternatives, enabling rapid switching between operations without allowing memory cell relaxation to occur, thus maintaining measurement accuracy.
Solution Approach 2:
The patent implements dynamic switching control where the switching elements are designed to respond rapidly to control signals, adapting their state almost instantaneously. This dynamic response capability ensures that switching occurs faster than the memory cell's relaxation time constant, preventing measurement errors while maintaining operational flexibility.
3Measurement precision
If synchronized switching between voltage generator and measurement device is implemented, then measurement distortion is eliminated, but system coordination complexity increases
Solution Approach 1:
The patent combines the switching control functions into a unified control mechanism where a single control signal coordinates both the voltage generator and measurement device switching simultaneously. This merged control approach ensures synchronized operation without requiring complex multi-channel coordination, thereby eliminating measurement distortion while keeping system complexity manageable.
Solution Approach 2:
The patent implements feedback control where the switching elements monitor and respond to the operational state, automatically coordinating their switching actions. This feedback mechanism ensures that the voltage generator and measurement device are switched in proper sequence without requiring complex external coordination logic, thereby maintaining measurement accuracy while simplifying system control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents memory cell relaxation and eliminates voltage peaks, enabling precise characterization of NOR-type flash memory cells with accurate endurance testing and reliable measurement of electrical properties, improving the analysis of memory cell reliability.
Implementation Method 1
The memory cell is erased by applying a strong negative voltage to the control gate for 1 ms to 200 ms, for example, between -10 V and -20 V, while the drain is connected to ground (zero voltage). This allows the electrons trapped in the floating gate to be tunneled through the gate oxide.
Implementation Method 2
One method for reading the memory cell (i.e., determining its state: written or erased) involves applying a voltage ramp to the control gate, for example, from 0 V to 10 V, while the drain is biased at approximately 0.5 V, and measuring the drain current during this voltage ramp.
Data Source
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AI summary
The invention relates to a system for characterizing a NOR type flash memory cell equipped with a floating gate transistor (30). This system comprises a voltage generator (31) having an output (ch0) connected to the gate electrode (G) of the transistor and configured to generate at its output an erase signal for the memory cell; and a dynamic measuring device (34) comprising a first channel (ch1) connected to the gate electrode (G) and a second channel (ch2) connected to the drain electrode (D) of the transistor, the dynamic measuring device (34) being configured to generate on the first and second channels (ch1, ch2) write signals for the memory cell and to measure a current (ID) flowing in the drain electrode (D) during the writing of the memory cell. Only the gate electrode (G) of the floating gate transistor (30) is connected to the voltage generator (31) and to the dynamic measuring device (34) via a switch (60).The switch is a CMOS type and capable of toggling between a first position, in which the output (ch0) of the voltage generator (31) is electrically coupled to the grid electrode (G), and a second position, in which the first channel (ch1) of the measuring device (34) is electrically coupled to the grid electrode (G). The dynamic measuring device (34) is further configured to generate a synchronization signal (trig) transmitted to the voltage generator (31) and the switch (60) to simultaneously control the generation of the clearing signal and the toggling of the switch to the first position.