Self-Aligned Contact Plug Formation in High-Density Flash Memory

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Solution Overview

Problem

As flash memory devices become highly integrated and miniaturized, the narrow space between select lines poses a challenge in forming source and drain contact plugs without miss alignment between metal lines and contact plugs.

Innovation Solution

The formation of spacers on the sidewalls of trenches in a dielectric layer allows for the creation of contact holes with a wider top width than bottom width, preventing miss alignment by self-alignment up to the top surface of the contact plug, and gap filling with a conductive material to form contact plugs with increased process margin.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the space between select lines is narrowed for high integration, then integration density is improved, but alignment precision between metal lines and contact plugs deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The spacer structure performs self-alignment by extending from the bottom surface to the top surface of the contact plug, automatically guiding the metal line formation process to align with the contact plug without requiring additional alignment steps, thus solving the alignment precision problem in highly integrated devices

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The spacer extends in the vertical dimension from bottom to top surface of the contact plug, creating a three-dimensional alignment reference that ensures precise horizontal alignment of metal lines with contact plugs even when horizontal space is constrained for high integration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7851350B2Semiconductor device and method of forming contact plug of semiconductor device
Publication Date: 2010.12.14 SK HYNIX INC
  • US7851350B2 patent drawing
  • US7851350B2 patent drawing
  • US7851350B2 patent drawing

AI summary

The present invention relates to a semiconductor device and a method of forming a contact plug of a semiconductor device. According to the method, a first dielectric layer is formed on a semiconductor substrate in which junction regions are formed. A hard mask is formed on the first dielectric layer. The hard mask and the first dielectric layer corresponding to the junction regions are etched to form trenches. Spacers are formed on sidewalls of the trenches. Contact holes are formed in the first dielectric layer using an etch process employing the spacers and the hard mask so that the junction regions are exposed. The contact holes are gap filled with a conductive material, thus forming contact plugs. Accordingly, bit lines can be easily formed on the contact plugs formed at narrow spaces with a high density.