Flash Memory Control Circuit Decoding for Speed
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional EEPROM control by microcomputer leads to time lags and limited signal wire control, resulting in slow processing speeds due to the need for multiple instructions and data transmissions for single operations.
Innovation Solution
A semiconductor memory device with a control circuit that decodes instructions from a microcomputer to directly control power source and sense amplifier operations, reducing the reliance on microcomputer signals and improving processing speed by using hardware for routine tasks like voltage generation and verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If control is implemented using a microcomputer with software-based automatic control, then the quantity of signal wires is reduced and manufacturing cost is suppressed, but processing speed is retarded due to time-lag and limited signal wire control capacity
Solution Approach 1:
The control system is segmented into two independent parts: a microcomputer for high-level control and a dedicated control circuit for low-level operations. This segmentation allows the control circuit to handle time-sensitive operations independently, eliminating the time-lag associated with microcomputer-based control while maintaining the simplified signal wire architecture.
Solution Approach 2:
A control circuit is introduced as an intermediary between the microcomputer and the power source circuit/sense amplifier. This intermediary decodes microcomputer instructions and generates direct control signals, thereby bridging the gap between software control and hardware operation to eliminate processing delays.
2Adaptability or versatility
If control operations are performed sequentially through multiple instructions and data transmissions, then control flexibility is maintained, but processing time increases due to time-lag
Solution Approach 1:
The control circuit is pre-configured with decoding logic and control signal generation capabilities. Upon receiving a microcomputer instruction, it immediately begins decoding and generating the necessary control signals without waiting for sequential microcomputer processing, thereby reducing time-lag while maintaining control flexibility.
Solution Approach 2:
The control circuit operates continuously and independently of the microcomputer's instruction execution speed. It maintains continuous readiness to decode instructions and generate control signals, ensuring that useful control actions are performed without interruption or time-lag associated with sequential microcomputer processing.
Data Source
AI summary
A semiconductor memory device includes a memory cell array, a power source circuit, a sense amplifier, a control circuit, and a processor. The memory cell array includes a nonvolatile memory cell. The power source circuit includes a first register and generates a voltage. The sense amplifier includes a second register, reads from the memory cell and amplifies the read data. The control circuit includes a third register and controls operations of the power source circuit and the sense amplifier. The processor controls the operations of the power source circuit, the sense amplifier and the control circuit by giving an instruction to the first to third registers. The control circuit decodes the instruction received at the third register so as to control the power source circuit and the sense amplifier directly based on a result of decoding.