Flash Memory Control Method for Power Recovery

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Solution Overview

Problem

Flash memory storage devices face complexity in managing storage space due to the need for block-level erase operations and data invalidation, requiring specialized controllers to efficiently handle write operations and power recovery processes.

Innovation Solution

A flash memory control technology that includes a microcontroller and random access memory to generate command sequence information, allocate temporary storage, upload data onto a run-time write block, and check for valid data during power recovery, ensuring data consistency and operational efficiency by abandoning write data that is later in the sequence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If write data is uploaded onto the run-time write block without following the command sequence to improve operational efficiency, then productivity is improved, but data integrity may be compromised during power recovery

Engineering Contradiction:
Improveoperational efficiencyVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary actions by storing command sequence information in the run-time write block before actual write operations. This allows the system to upload write data without strictly following command sequence order for improved efficiency, while the pre-stored sequence information enables correct data reconstruction during power recovery

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Command sequence information acts as an intermediary between the write data and the flash memory storage system. This intermediary contains metadata that tracks the intended write sequence, allowing the system to optimize upload operations while maintaining data integrity through power recovery verification

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If block-level erase operations are performed to release storage space, then storage space is recovered for reuse, but device complexity increases due to block-by-block management requirements

Engineering Contradiction:
Improvestorage spaceVSAvoidcontroller complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The flash memory storage space is segmented into multiple physical blocks, each containing multiple physical pages. This segmentation enables block-level erase operations to release storage space efficiently while the controller manages individual block states to track available space for reuse

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the state parameter of storage blocks between used and erased states. By tracking block-level states and performing selective erase operations on individual blocks, the system recovers storage space without requiring complete device erasure, managing complexity through state tracking

Inventive Principle:
Principle #35Parameter changes

3Reliability

If new data is written into spare space rather than overwriting old data, then data integrity is maintained, but storage space management becomes more complex

Engineering Contradiction:
Improvedata integrityVSAvoidstorage space management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system extracts and separates command sequence information from the actual write data. By storing this sequence information in the run-time write block, the system can write new data into spare space while maintaining integrity verification capabilities through the separated sequence metadata

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system creates a copy of the command sequence information and stores it in the run-time write block alongside write data. This copying mechanism enables the system to write data to spare space while maintaining a reference copy for integrity verification during power recovery operations

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9569126B2Data storage device and flash memory control method
Publication Date: 2017.02.14 SILICON MOTION INC
  • US9569126B2 patent drawing
  • US9569126B2 patent drawing
  • US9569126B2 patent drawing

AI summary

A flash memory control technology with power recovery capability, by which command sequence information is generated for write data that is requested to be written into a flash memory. A random access memory is allocated for temporary storage of the write data and the command sequence information. The write data is uploaded from the random access memory onto a run-time write block between physical blocks of the flash memory with the command sequence information corresponding thereto. During a power recovery process of a data storage device that is equipped with the flash memory, the run-time write block is checked and, according to the command sequence information that has been uploaded onto the run-time write block, the write data in the run-time write block and later in a command sequence than lost data is abandoned.