Flash Memory Control Method for Reducing Erase Write Cycles

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Solution Overview

Problem

The existing methods for storing data in flash memory require a high number of erase and write operations, which is inefficient and reduces the lifespan of the memory, especially when using flash memory as an auxiliary unit in communication devices, often necessitating complex memory controllers and additional components like buffers or translation tables.

Innovation Solution

A method for controlling flash memory that reduces the number of erase and write operations by comparing data to be written with existing data at the byte or bit level, allowing only necessary operations and reserving erased memory units for new data, without the need for a separate memory controller or cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional methods are used to store data in flash memory, then data can be stored, but a high number of erase and write operations are required which reduces memory lifespan

Engineering Contradiction:
Improveflash memory lifespanVSAvoidnumber of erase and write operations
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by comparing the data to be written with existing data in the flash memory block before performing erase and write operations. This comparison is done in advance to identify which memory units actually need to be modified, allowing the system to skip unnecessary erase and write operations and thereby extend flash memory lifespan while maintaining data storage functionality.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If a separate memory controller and cache are used to manage flash memory, then data storage can be optimized, but device complexity increases

Engineering Contradiction:
Improvedata storage efficiencyVSAvoidmemory controller and additional components
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the data comparison and management functionality from a separate memory controller and integrates it directly into the processing unit that generates the data. This eliminates the need for dedicated flash memory control hardware and cache memory, reducing device complexity while maintaining efficient data storage through the comparison-based approach that identifies only the necessary memory units for modification.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If entire blocks are erased before writing new data, then data can be stored in flash memory, but unnecessary erase operations increase and reduce memory lifespan

Engineering Contradiction:
Improvedata storage operationVSAvoidmemory lifespan
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by treating different memory units within a block differently based on their actual content requirements. Instead of erasing entire blocks uniformly, the system compares incoming data with existing data at the memory unit level and performs erase and write operations only on the specific memory units that contain different data. This localized approach maintains data storage functionality while minimizing unnecessary operations that would reduce memory lifespan.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP2923261B1Method for controlling a flash memory for mass storage, which is comprised by a communications device that can be connected to a host, and computer program product for carrying out said method
Publication Date: 2023.03.08 UNIFY GMBH & CO KG
  • EP2923261B1 patent drawingFigure 1
  • EP2923261B1 patent drawingFigure 2
  • EP2923261B1 patent drawingFigure 3

AI summary

The invention relates to a method for controlling a flash memory (9), which is comprised by a secondary unit of a communications device (2) which can be connected to a host (1) and, for mass storage, is written with data (SS1, SSN, SS1N, SA, BE, S1N, S1ML) to be stored. According to the invention, the flash memory (9) is subdivided into blocks (10) which each comprise storage units (S1-SN), and a storage unit (SS1) that has been written to can only be written to again if, before writing to the storage unit (SS1), all the storage units (S1, S2, SS1, SN) of the block (10) of the storage unit (SS1) to be written to are erased. The flash memory (9) is controlled in such a way that at least some storage units (S1-SN) which are to be written to and the data (SG, SS1N, SAI, BEI, S1MLG) of said units is unchanged after being written to as compared with before being written to are neither erased nor written to, and at least some erased storage units (S SG, SDG, SMG) which are to be written to and the data (SG) of said units is changed after being written to as compared with before being written to, are written to with the data to be stored (SS1N, BEI, S1NI) without being erased again.