Flash Memory Controller Parallel Bank Segmentation
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Solution Overview
Problem
Current flash memory systems face challenges in increasing data transfer speed due to the need for sequential writing and large erasure blocks, which result in low write efficiency and reduced service life, especially when trying to achieve high-speed storage with multi-bank or multi-chip configurations.
Innovation Solution
A storage device with a flash memory and control unit that employs additional writing to empty regions, invalidates original data, and automatically restores invalidated regions during standby, using nonvolatile RAM for progress information and interrupting restoration processing for external access, allowing for efficient data management and high-speed access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If sequential writing and large erasure blocks are used in flash memory systems, then data transfer speed can be increased, but write efficiency decreases and service life is reduced
Solution Approach 1:
The flash memory is divided into multiple independent banks or chips, each capable of parallel operations. The memory space is segmented into multiple erasure blocks that can be managed independently, allowing simultaneous programming and erasing operations across different segments, thereby improving both speed and write efficiency
Solution Approach 2:
The system performs preliminary classification of pages into valid and invalid categories before erasure operations. By identifying and marking invalid pages in advance, the system can selectively erase only the necessary blocks rather than entire large erasure blocks, improving write efficiency while maintaining high data transfer speeds
2Reliability
If sequential writing is used in flash memory, then data integrity is maintained, but the number of erasure operations increases and service life is reduced
Solution Approach 1:
The system changes the state parameter of pages from valid to invalid without physical erasure, using a logical marking mechanism. This allows the memory controller to track and manage page states, performing erasure only when necessary and only on blocks containing invalid data, thereby reducing the total number of erasure operations and extending service life while maintaining data integrity
Solution Approach 2:
The system discards invalid pages by marking them logically rather than immediately erasing them physically. These marked pages are recovered through selective erasure of entire blocks only when needed, reducing unnecessary erasure operations and extending the operational life of the flash memory while preserving data integrity through proper validation
3Productivity
If large erasure blocks are used, then programming speed is improved through parallel processing, but write efficiency is reduced due to erasing unnecessary data
Solution Approach 1:
The system performs preliminary validation and classification of pages before erasure operations, identifying which pages contain valid data and which are invalid. This preliminary action enables selective erasure of only those blocks that contain invalid pages, preventing the loss of valid data while maintaining the parallel processing benefits of larger block operations
Solution Approach 2:
The system maintains copies of valid data through validation mechanisms and address mapping tables that track the location and status of each page. This copying and tracking approach allows the system to safely erase blocks containing invalid data without losing important information, improving write efficiency while preserving programming speed through parallel block operations
Data Source
AI summary
A storage device enabling realization of a new storage configuration enabling apparent elimination of the overhead and enabling high speed access all the time particularly when constructing a high parallel configured high speed flash memory system, that is, a storage device having a flash memory as a main storage and having the function of rewriting at least a partial region of the flash memory by additional writing update data in an empty region and invalidating original data and, at the time of standby of the device where there is no access from the outside, performing processing for automatically restoring the invalidated region to an empty region, and a computer system and a storage system using the same.