Flash Memory Controller Command Queue Substitute Logic

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Solution Overview

Problem

Conventional data access methods for flash memory devices result in significant delays when a target memory is busy, causing the controller to wait for an extended period, which degrades the performance of the data storage device by preventing the processing of subsequent commands from the host.

Innovation Solution

A data access method where commands from a host are stored in a command queue, allowing the controller to select a substitute command from subsequent commands if the target memory is busy, ensuring that access operations can proceed without delay by utilizing chip enable signals to determine memory states and logical address ranges to avoid data errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the controller waits for the target memory to become idle before processing commands, then data accuracy is maintained, but execution delay increases and performance degrades

Engineering Contradiction:
Improvedata accuracyVSAvoidexecution delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The controller performs preliminary actions by selecting and preparing substitute commands from the command queue before the target memory becomes idle. When the target memory is determined to be busy, the controller has already identified alternative commands that can be executed immediately, eliminating the waiting period while maintaining data integrity through proper substitution logic.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The substitute command acts as an intermediary solution between the host's command queue and the busy target memory. Instead of directly blocking on the unavailable memory resource, the controller introduces substitute commands from other memories that can be executed in the meantime, mediating the conflict between command processing continuity and memory availability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the controller processes subsequent commands while waiting for the target memory, then productivity improves, but data errors may occur

Engineering Contradiction:
Improvecommand processing throughputVSAvoiddata error prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The controller performs preliminary verification by determining whether substituting commands will cause data errors before executing them. The substitution logic includes checks to ensure that executing substitute commands instead of the target command does not compromise data integrity, allowing productive parallel processing while maintaining reliability constraints.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller uses feedback mechanisms to monitor the busy state of the target memory and dynamically adjust command execution. By continuously checking memory status and evaluating whether substitute commands are safe to execute, the system receives feedback that guides whether to proceed with substitution or wait, balancing productivity gains against data error prevention.

Inventive Principle:
Principle #23Feedback

3Loss of time

If the controller implements a command queue with substitute command selection, then execution delay is reduced, but device complexity increases

Engineering Contradiction:
Improvecontroller idle timeVSAvoidcontroller logic complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The command processing function is segmented into distinct components: command queue management, target memory status monitoring, substitute command selection logic, and execution control. This segmentation allows the complex substitution mechanism to be implemented as modular functions within the controller, managing complexity through structured organization while enabling reduced idle time through specialized sub-tasks.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8868851B2Data access method of a memory device
Publication Date: 2014.10.21 SILICON MOTION INC
  • US8868851B2 patent drawing
  • US8868851B2 patent drawing
  • US8868851B2 patent drawing

AI summary

The invention provides a data access method of a memory device. In one embodiment, the memory device comprises a plurality of memories. First, a plurality of commands sequentially received from a host is stored in a command queue. A target command is then retrieved from the command queue. A target memory accessed by the target command is then determined. Whether the target memory is in a busy state is then determined. When the target memory is not in a busy state, access operations requested by the target command are then performed. When the target memory is in a busy state, a substitute command is selected from a plurality of subsequent commands stored in the command queue and access operations requested by the substitute command are performed, wherein the sequence of the subsequent commands in the command queue is subsequent to the target command.