Flash Memory Controller Data Toggle Operation
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Solution Overview
Problem
Conventional flash memory devices require complex command sequences and longer waiting times for multiple plane operations due to the need for separate read commands for each plane, complicating data communication between the flash memory device and controller.
Innovation Solution
A flash memory device and controller system with an I/O control circuit, command register, and control circuit that performs a data toggle operation to sequentially transmit data units from multiple planes using a single command sequence, simplifying the communication process and reducing waiting times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple read commands are issued to read data from multiple planes separately, then data can be read from each plane, but the command sequence becomes more complicated and waiting time increases
Solution Approach 1:
The patent combines multiple plane operations into a single command sequence by implementing a data toggle operation that automatically switches between planes. The control circuit receives one read command and internally manages data retrieval from multiple planes (e.g., even-plane and odd-plane) by toggling between them, eliminating the need for separate read commands for each plane and reducing command sequence complexity
Solution Approach 2:
The flash memory device performs self-service by automatically managing multi-plane data retrieval without external intervention. The control circuit internally toggles between different planes based on the read command, automatically selecting and transferring data from the appropriate plane without requiring the controller to issue multiple separate commands, thereby improving productivity while maintaining simple command sequences
2Quantity of substance
If multiple read commands are issued for multiple planes, then all plane data can be read, but the waiting time period becomes longer
Solution Approach 1:
The patent implements continuous useful action by enabling overlapping operations within the flash memory device. While data from one plane is being transmitted, the control circuit prepares data from another plane, ensuring that the data path remains continuously active. This toggle operation allows the device to maintain continuous data flow from multiple planes without idle waiting periods between sequential read operations
Solution Approach 2:
The control circuit performs preliminary actions by pre-loading and preparing data from multiple planes before transmission is required. The device anticipates the need for multi-plane data by internally organizing and buffering data from different planes in advance, allowing immediate transmission when commanded without waiting for sequential read operations to complete
3Ease of operation
If separate read commands are used for each plane, then data communication is straightforward, but the command sequence complexity increases
Solution Approach 1:
The patent introduces an intermediary control circuit within the flash memory device that mediates between the simple external read command and the complex internal multi-plane data retrieval process. This control circuit acts as a mediator that translates a single external command into coordinated internal operations across multiple planes, maintaining ease of operation for the controller while managing the complexity internally without exposing it to the external interface
Data Source
AI summary
A method of a flash memory controller includes: providing an input/output (I/O) circuit coupled to the flash memory device; and sending a data toggle set-feature signal to the flash memory device to enable, disable, or configure a data toggle operation of the flash memory device; the data toggle operation of the flash memory device is arranged to make the flash memory device control the flash memory device's data register selecting and transferring a first data unit and a second data unit to the flash memory device's I/O control circuit to make the I/O control circuit sequentially transmit the first data unit and the second data unit to the flash memory controller through the specific communication interface in response to a specific read command or a data toggle command transmitted by the flash memory controller.