Flash Memory Controller Dual-Dimensional ECC Error Correction
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Solution Overview
Problem
Conventional flash memory controllers have limited error correction capabilities, leading to high error rates during data reading, especially in three-dimensional blocks.
Innovation Solution
A flash memory controller with a specific buffer and an error correction code circuit that performs wordline-dimensional and finger-dimensional error correction code operations to generate check code data, correcting data errors in super blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction code operations are used, then the device complexity is low, but the reliability of data storage deteriorates due to high error rates in three-dimensional blocks
Solution Approach 1:
The error correction mechanism is segmented into two independent dimensions: wordline-dimensional ECC and finger-dimensional ECC. Each dimension operates separately with its own check code generation and correction processes, allowing the system to address errors in different spatial orientations without requiring a completely redesigned complex system
Solution Approach 2:
The patent transitions from conventional single-dimensional error correction to two-dimensional error correction by introducing finger-dimensional ECC alongside wordline-dimensional ECC. This dimensional expansion enables the system to correct errors that occur across multiple wordlines and fingers simultaneously, significantly improving reliability for three-dimensional block structures
2Manufacturing precision
If single-dimensional error correction is used, then the processing speed is fast, but the manufacturing precision of error correction deteriorates due to inability to correct errors in three-dimensional blocks
Solution Approach 1:
The correction process is divided into two sequential stages: wordline-dimensional correction first, then finger-dimensional correction. This segmentation allows each correction stage to focus on specific error patterns, improving overall correction precision without requiring all corrections to occur simultaneously, thus maintaining processing efficiency
Solution Approach 2:
The wordline-dimensional ECC operates as a preliminary correction stage that addresses errors before the finger-dimensional ECC process. This preliminary action reduces the burden on the second correction stage, enabling more precise error correction while maintaining overall processing speed through staged intervention
Data Source
AI summary
A flash memory controller, to be coupled between a host device and a flash memory module, includes an error correction code (ECC) circuit. The ECC circuit performs a wordline-dimensional ECC operation upon specific data, sent from the host device to form a super block stored within the flash memory module, to generate wordline-dimensional parity data and performs a finger-dimensional ECC operation upon the specific data generate finger-dimensional parity data. The ECC circuit corrects an error of the superblock by using the wordline-dimensional parity data and the finger-dimensional parity data so as to obtain correct data content of the specific data.