Flash Memory Controller Erasure Verification via Specific Page Writing
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Solution Overview
Problem
Flash memory devices, such as NAND Flash, require a long time to erase all blocks sequentially, causing difficulties for developers and users due to the time-consuming nature of the erasing process.
Innovation Solution
A data-storage device with a controller that receives an erase signal and executes an erasing process on flash memory blocks by writing a predetermined value to a specific page of each block after erasing the rest, updating the mapping table to map all logical addresses of the block to the physical address of the specific page, allowing for efficient completion verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the flash memory sequentially erases all blocks one by one, then complete erasure is achieved, but the erasing time becomes excessively long
Solution Approach 1:
The patent segments the erasure verification process by selecting only specific pages (e.g., first and last pages) from each block for erasure and verification, rather than erasing all pages sequentially. This segmentation allows the system to verify erasure completion by checking only these representative pages, dramatically reducing the time required while maintaining reliability through strategic sample selection.
2Reliability
If all pages of each block are fully erased sequentially, then complete data removal is ensured, but the processing speed becomes too slow
Solution Approach 1:
The patent applies partial action by erasing only specific pages (first and last pages) of each block instead of all pages. This partial erasure approach is sufficient for verification purposes and allows the system to determine erasure completion without processing every single page, thereby significantly improving processing speed while maintaining adequate reliability through the strategic selection of representative pages.
3Stability of the object's composition
If the flash memory erases blocks in sequential order, then systematic erasure is achieved, but the overall erasure duration increases
Solution Approach 1:
The patent segments the erasure process by identifying and erasing only specific pages (first and last pages) within each block rather than processing all pages sequentially. This segmentation maintains the systematic structure of block-by-block erasure while dramatically reducing the duration by eliminating redundant page processing, thus resolving the contradiction between structured erasure and erasure speed.
Data Source
AI summary
The present invention provides a data-storage device. The data-storage device includes a flash memory and a controller. The flash memory includes a plurality of blocks, and each of the blocks includes a plurality of pages. The controller is arranged to receive an erase signal from a host, and enable the flash memory to sequentially execute an erasing process on at least one first block of the blocks in response to the erase signal, wherein a specific page of the first block has been written by a predetermined value and the other pages of the first block in exception to the specific page have been erased after the erasing process executed on the first block is completed.


