Flash Memory Controller Group-Based Wear Leveling

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Solution Overview

Problem

Existing flash memory systems face inefficiencies in data access and management, particularly in balancing wear leveling and sector allocation, which can lead to reduced performance and lifespan due to inefficient data distribution and block management.

Innovation Solution

A microcomputer-based memory controller that utilizes a file system manager and memory control section to manage flash memory through a file system definition table and group definition table, allowing for efficient data reading and writing by allocating sectors and performing wear leveling through group management and garbage collection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If sequential writing in increasing address direction is used, then data access simplicity is improved, but wear leveling performance deteriorates

Engineering Contradiction:
Improvedata access simplicityVSAvoidwear leveling performance
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The flash memory is divided into multiple groups, each managed independently with its own logical-to-physical address mapping. This segmentation allows wear leveling to be performed at the group level while maintaining simple sequential access within each group, resolving the contradiction between access simplicity and wear leveling effectiveness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the addressing parameter by introducing group-based logical address spaces instead of a single continuous address space. Each group has its own address mapping parameters, enabling independent wear leveling while preserving sequential access patterns within groups.

Inventive Principle:
Principle #35Parameter changes

2Duration of action of stationary object

If comprehensive wear leveling across all blocks is performed, then memory lifespan is improved, but processing time increases

Engineering Contradiction:
Improvememory lifespanVSAvoidprocessing time
Core Design Contradiction:
Duration of action of stationary objectVSLoss of time

Solution Approach 1:

Wear leveling is segmented into group-level operations rather than system-wide operations. The controller performs wear leveling independently on each group, significantly reducing the time required compared to processing all blocks comprehensively, while still extending overall memory lifespan through distributed wear management.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial wear leveling by focusing on specific groups that need balancing rather than processing all memory blocks. This partial action approach achieves sufficient wear distribution to extend memory lifespan without incurring the full time cost of comprehensive wear leveling across the entire memory space.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If detailed sector tracking is implemented, then data management precision is improved, but memory resources are consumed

Engineering Contradiction:
Improvedata management precisionVSAvoidmemory resources
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent segments the tracking overhead by maintaining sector state information at the group level rather than requiring detailed tracking across the entire memory space. This reduces the amount of memory resources needed for metadata while preserving sufficient precision for data management operations within each group.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements partial sector tracking by monitoring only the necessary state information for active groups rather than maintaining comprehensive detailed tracking for all sectors. This partial tracking approach provides sufficient data management precision for operational needs while consuming fewer memory resources.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP2672389B1Memory controller
Publication Date: 2019.02.27 MITSUBISHI ELECTRIC CORP
  • EP2672389B1 patent drawingFigure 1
  • EP2672389B1 patent drawingFigure 2~3
  • EP2672389B1 patent drawingFigure 4~5

AI summary

A microcomputer (10) retains a group definition table (132) associating the sector sections created by dividing all sectors into multiple sections under a given condition with different memory regions on a flash memory (20), respectively. A memory control section (120) makes reference to the group definition table (132) to identify a memory region corresponding to a specified sector, and searches the identified memory region range for a physical address corresponding to the specified sector. Furthermore, the memory control section (120) moves a specified sector within the identified memory region range for rewriting data corresponding to the specified sector.