Flash Memory Controller Logical-to-Physical Address Mapping for Bad Block Replacement
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Solid state storage systems using NAND flash memories face inefficiencies due to the need for additional bad block management maps and underutilization of reserved areas, especially when the occurrence of bad blocks is low, which degrades memory efficiency.
Innovation Solution
A solid state storage system that allocates logical and physical addresses to replacement blocks within the reserved area, allowing the memory controller to select replacement blocks using logical addresses and perform wear leveling on unused replacement blocks, eliminating the need for an additional bad block management map and enhancing the use efficiency of reserved areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an additional bad block management map is allocated to manage bad block positions, then bad block management capability is improved, but memory efficiency deteriorates due to reduced usable storage space
Solution Approach 1:
The patent merges the bad block management function into the existing address mapping table by adding a replacement block address field to the conventional L2P mapping structure. This integration eliminates the need for a separate bad block management map, allowing the same data structure to serve dual purposes: mapping logical addresses to physical addresses and tracking bad block replacements.
Solution Approach 2:
The address mapping table is designed to perform multiple functions simultaneously: it maps logical addresses to physical addresses for normal data storage and also tracks bad block positions and replacement block assignments. This multi-functional design eliminates the need for dedicated bad block management structures, improving overall memory efficiency.
2Reliability
If a reserved area is allocated for replacing bad blocks, then bad block replacement capability is improved, but use efficiency of the reserved area deteriorates when bad blocks occur infrequently
Solution Approach 1:
The patent implements dynamic management of replacement blocks by allowing the reserved area to be flexibly allocated and reused. When bad blocks occur, replacement blocks are selected from the reserved area; when the reserved area has unused blocks, wear leveling operations are performed to redistribute data and maintain block health. This dynamic approach ensures the reserved area remains useful even when bad block occurrence is low.
Solution Approach 2:
The system changes the operational parameters of replacement blocks based on their usage state. Unused replacement blocks in the reserved area are subjected to wear leveling operations to prevent future bad block formation, while used replacement blocks are managed through the address mapping table. This parameter change strategy optimizes the utility of the reserved area under different bad block occurrence conditions.
3Measurement precision
If replacement blocks are selected using logical addresses from an address mapping table, then bad block replacement accuracy is improved, but system complexity deteriorates due to additional mapping operations
Solution Approach 1:
The patent combines the bad block replacement selection process with the existing logical-to-physical address mapping operation. The address mapping table includes fields for both normal physical address mapping and bad block replacement tracking, allowing both functions to be executed in a single lookup operation rather than requiring separate management processes.
Data Source
AI summary
A solid state storage system includes a flash memory area and a memory controller. The flash memory area includes memory blocks and replacement blocks configured to replace bad blocks occurring within the memory blocks. The memory controller is configured to perform a logical-to-physical address mapping on logical blocks including the replacement blocks, and select the replacement blocks using logical addresses of the logical blocks corresponding to the bad blocks.