Flash Memory Controller Mapping Table Update Strategy
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Solution Overview
Problem
Existing Flash memory control methods face challenges in efficiently updating logical-to-physical address mapping tables, particularly in managing the distribution of write data across buffer blocks to minimize update time and optimize storage efficiency.
Innovation Solution
A data storage device and method that divides Flash memory into blocks and pages, using a controller to update the logical-to-physical address mapping table based on a group count that reflects the distribution of write data, allowing for controlled updates by classifying logical addresses into groups and determining the timing of updates based on threshold values and buffer block fullness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the logical-to-physical address mapping table is updated frequently to maintain data consistency, then data reliability is improved, but the time spent on each update increases and storage efficiency deteriorates
Solution Approach 1:
The patent segments the address mapping table into multiple pages, each page containing a subset of logical-to-physical address mappings. Instead of updating the entire mapping table at once, the system updates only the specific pages that contain changed data. This segmentation allows for partial updates, reducing the overall update time while maintaining data consistency for the modified portions.
Solution Approach 2:
The system performs partial updates by identifying and updating only the specific pages that contain modified logical-to-physical address mappings, rather than updating the entire mapping table. The controller determines which pages need updating based on the buffer block selection criteria (fullness threshold or group count threshold), thereby performing minimal necessary actions to maintain reliability while reducing time loss.
2Reliability
If the entire address mapping table is updated whenever buffer block is full or group count exceeds threshold, then data consistency is maintained, but the complexity of update management increases
Solution Approach 1:
The controller implements feedback mechanisms by continuously monitoring two key parameters: the fullness level of buffer blocks and the group count of logical addresses. When either parameter exceeds predefined thresholds, the controller triggers an update operation. This feedback-based approach automates the update decision-making process, maintaining mapping table consistency while reducing the complexity of manual update management through clear, rule-based triggers.
3Reliability
If all pages in the address mapping table are updated simultaneously, then consistency across the entire table is improved, but the time and resources required for each update operation increase significantly
Solution Approach 1:
The address mapping table is divided into multiple independent pages, each capable of being updated separately. The controller identifies which specific pages contain modified logical-to-physical address mappings and updates only those pages. This segmentation strategy maintains consistency within updated pages while avoiding unnecessary updates to other pages, thereby improving storage efficiency and reducing update time.
Solution Approach 2:
Instead of performing full table updates, the system executes partial updates limited to only the pages that contain changed data. The controller determines the minimal set of pages requiring updates based on buffer block status and group count thresholds, performing exactly the necessary work to maintain consistency without the overhead of updating the entire mapping table.
Data Source
AI summary
A mapping table H2F update technique for a FLASH memory is disclosed. In a disclosed data storage device, the controller updates a logical-to-physical address mapping table between a host and the FLASH memory in accordance with a group count of a buffer block of the FLASH memory. The group count reflects a logical address distribution of write data buffered in the buffer block and with non-updated logical-to-physical address mapping information. The higher the group count, the more dispersed the logical address distribution. In this manner, each update of the logical-to-physical address mapping table just takes a short time.