Flash Memory Controller Pattern Data Mapping
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Solution Overview
Problem
Flash memory requires an erase-before-write operation, limiting its write cycles and making it inefficient compared to other memory types, as it cannot support overwriting data within a page without erasing the entire block.
Innovation Solution
An electronic device with a host device and a block device that includes a controller to determine if incoming data is pattern data configured with repeating bit values, allowing it to map these values using a logical to physical mapping table, thereby reducing the number of write operations and extending memory lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flash memory performs erase-before-write operation, then write operation can be completed, but the number of write cycles is limited and operation efficiency deteriorates
Solution Approach 1:
The patent segments data into pattern data (repeating bit values) and non-pattern data, applying different storage strategies to each. Pattern data is stored in the logical-to-physical mapping table without physical write operations, while non-pattern data undergoes normal erase-before-write operations. This segmentation resolves the contradiction by eliminating unnecessary write cycles for pattern data while maintaining reliable storage for all data types.
Solution Approach 2:
The patent creates a virtual copy of pattern data by storing only the repeating bit value and its repetition count in the mapping table, rather than physically writing the entire repeated sequence to flash memory. This copying approach allows the system to represent large amounts of pattern data with minimal physical write operations, extending write cycle lifetime while maintaining data integrity.
2Reliability
If flash memory performs erase-before-write operation, then write operation can be completed, but operation efficiency and productivity deteriorate
Solution Approach 1:
The patent segments data into pattern data (repeating bit values) and non-pattern data, applying different storage strategies to each. Pattern data is stored in the logical-to-physical mapping table without physical write operations, while non-pattern data undergoes normal erase-before-write operations. This segmentation resolves the contradiction by eliminating unnecessary write cycles for pattern data while maintaining reliable storage for all data types.
Solution Approach 2:
The patent performs preliminary analysis of incoming data to identify pattern data before the actual write operation. By detecting repeating bit values in advance and determining the repetition count, the system can bypass the erase-before-write process for pattern data entirely, significantly improving operation efficiency while ensuring reliable storage through the mapping table mechanism.
3Quantity of substance
If pattern data is stored in logical to physical mapping table, then data storage capacity increases and write operations decrease, but system complexity increases
Solution Approach 1:
The patent extends the existing logical-to-physical mapping table to serve dual functions: traditional address mapping and pattern data storage. The mapping table now stores both normal physical addresses and pattern representations (repeating bit values with counts), making it a multi-functional structure that increases storage capacity without adding separate hardware components, thereby limiting the increase in system complexity.
Solution Approach 2:
The patent changes the parameters stored in the mapping table from simple physical addresses to include pattern representations (repeating bit values and repetition counts). This parameter change allows the system to encode large amounts of pattern data compactly in the mapping table, effectively increasing data storage capacity while using the existing table structure rather than adding complex new systems.
Data Source
AI summary
An electronic device according to various embodiments of the present invention comprises a host device and a block device electrically connected to the host device, wherein the block device comprises a first memory and a controller electrically connected to the first memory, and the controller receives a write request for first data form the host device, determines whether the first data is pattern data configured in a form in which an assigned number of bit values are repeated, and, in response to the first data being determined to be the pattern data, controls the first memory to store the assigned number of bit values of the first data in a logical to physical mapping table after mapping the assigned number of bit values to a logical address indicated by the write request.