Flash Memory Controller Data Scrambling for MLC Error Reduction
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Solution Overview
Problem
MLC flash memories experience unstable characteristics, leading to write/program and read errors due to specific data patterns being constantly written to the same logical address, necessitating improved data pattern management mechanisms in flash memory controllers.
Innovation Solution
A method involving the use of a random seed to generate a random sequence for scrambling data and performing error correction encoding, resulting in a parity check code, which is stored in the flash memory to reduce error occurrence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is constantly written to the same logical address in MLC flash memory, then storage capacity is utilized efficiently, but write/program errors and read errors increase due to unstable characteristics and data pattern interference
Solution Approach 1:
The patent applies preliminary action by generating random sequences and performing error correction encoding before data is written to flash memory. The controller generates a random sequence, performs error correction encoding on the data using this random sequence, and stores both the encoded data and the random sequence. This preprocessing prevents data pattern interference before it occurs during storage, thereby maintaining data reliability even when constantly writing to the same logical addresses.
Solution Approach 2:
The patent uses a random sequence as an intermediary between the original data and the stored data. This random sequence acts as a mediator that transforms the data pattern, preventing direct interference between repeated writes to the same location. The random sequence is generated by the controller, used to encode the data, and stored alongside the data so the controller can regenerate the same sequence for accurate data retrieval, thus maintaining reliability while allowing high storage utilization.
2Productivity
If error correction encoding is performed without random sequence scrambling, then processing speed is maintained, but data pattern interference causes increased error occurrence
Solution Approach 1:
The patent performs error correction encoding as a preliminary action before data storage, using a random sequence that is generated and prepared in advance. This allows the encoding to be completed efficiently without adding significant processing delay, while still providing the benefit of pattern randomization that reduces errors. The random sequence is generated once and reused, maintaining processing speed while improving reliability.
Solution Approach 2:
The patent changes the parameter of data representation by introducing random sequences that transform the original data patterns. Instead of storing data in its original form, the data is encoded with random sequences that alter its pattern characteristics. This parameter change reduces data pattern interference and error occurrence while maintaining processing efficiency through optimized encoding operations.
Data Source
AI summary
An exemplary method for accessing a flash memory. The method comprising obtaining a first random sequence; utilizing the first random sequence as a first seed for generating a second random sequence, wherein the first random sequence is not equivalent to the second random sequence; scrambling data according to the second random sequence for generating scrambled data; performing an error correction encoding operation upon the first random sequence and the scrambled data for generating parity check code; and storing the scrambled data and the parity check code to the flash memory.