Flash Memory Controller Self-Estimation for Access Performance
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Solution Overview
Problem
Existing methods for estimating flash memory device access performance are affected by transmission delays and interference, leading to inaccurate results due to external testing software.
Innovation Solution
The flash memory device self-performs write and read access performance estimation by determining if free blocks can accommodate data, executing garbage collection if necessary, and calculating weight ratios to provide accurate performance metrics to the host.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external testing software is used to estimate access performance, then the host can obtain performance metrics, but transmission delays and interference affect measurement accuracy
Solution Approach 1:
The flash memory device performs self-diagnostics to estimate its own read and write access performance. The device's controller executes test operations internally without requiring external testing software, thereby eliminating transmission delays and interference while obtaining accurate performance metrics. This self-service approach allows the device to autonomously determine whether it meets predefined performance thresholds.
2Measurement precision
If the flash memory device performs self-estimation, then transmission interference is eliminated, but the device complexity increases
Solution Approach 1:
The controller is designed to perform multiple functions: it manages normal flash memory operations and simultaneously executes self-diagnostics to estimate access performance. By integrating performance estimation capabilities into the existing controller, the patent avoids adding separate dedicated hardware, thereby minimizing the increase in device complexity while achieving accurate self-measurement.
Solution Approach 2:
The controller changes operational parameters by switching between normal data operations and test operations. During self-diagnostics, the controller performs read and write test operations on flash memory blocks, measures access times, and compares results against predefined thresholds. This parameter-based approach allows performance estimation using existing hardware without requiring complex additional structures.
Data Source
AI summary
An estimation method for read and write access performance adapted for a computer system including a host and a flash memory device is disclosed. The flash memory device includes a controller, and a flash memory module having a plurality of blocks. When the host transmits a writing performance query instruction, the controller executes a writing performance estimation process including determining whether at least one free block can accommodate data to be written. If Yes, a reply signal including an optimal writing performance is transmitted to the host; and if No, at least one block having data stored therein is selected for execution of a garbage collection process. When the host transmits a reading performance query instruction, the controller executes a reading performance estimation process including determining a threshold interval within which an average retry times of shift read is located to determine a corresponding estimated reading performance.