Flash Memory Controller State Machine Adaptability
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Solution Overview
Problem
Flash memory apparatuses are inflexible and time-consuming to modify when memory card specifications change, requiring revisions to Verilog language and re-tape-out processes, which increases costs and reduces design flexibility.
Innovation Solution
A flash memory apparatus with a controller and register array that allows state machine logic circuits to transition between operation states based on stored state transition information, enabling modifications to the memory card specification without altering the logic circuits or performing a tape-out process, by loading updated state transition information into the register array upon power-up.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If Verilog language is revised and logic circuits are modified to accommodate memory card specification changes, then the flash memory apparatus can comply with new specifications, but the tape-out process becomes time-consuming and costly
Solution Approach 1:
The patent implements a dynamic state transition table that can be updated without modifying the underlying logic circuits. The state machine logic circuit reads from a configurable memory device (such as FLASH or SRAM) to obtain state transition information, allowing the system to adapt to new memory card specifications by simply updating the table contents rather than re-synthesizing the logic circuits.
Solution Approach 2:
The patent changes the parameter storage method from fixed Verilog code to configurable memory devices. The state transition table is stored in a memory device that can be programmed with different transition rules depending on the memory card specification version, allowing parameter changes without hardware modification.
2Adaptability or versatility
If Verilog language and logic circuits are revised for new memory card specifications, then specification compliance is achieved, but manufacturing cost increases due to additional tape-out processes
Solution Approach 1:
The system uses a dynamic configuration approach where the state transition table can be updated in the field without requiring manufacturing process changes. This eliminates the need for expensive tape-out processes when new specifications are introduced.
Solution Approach 2:
Instead of modifying the original logic circuits through tape-out, the patent creates a copy of the state transition information in a configurable memory device. This copy can be updated independently and cheaply without affecting the main logic circuit design.
3Device complexity
If state machine logic circuits are designed with fixed Verilog code, then the design is simple to implement, but flexibility for specification revisions is lost
Solution Approach 1:
The patent segments the state machine functionality into two parts: a simple, fixed state machine logic circuit that handles the basic transition logic, and a separate configurable memory device that stores the state transition table. This segmentation allows the logic circuit to remain simple while the table provides the flexibility for specification changes.
Solution Approach 2:
The configurable memory device acts as an intermediary between the fixed logic circuit and the external control signals. It mediates the interaction by providing configurable transition rules that the logic circuit follows, allowing flexibility without complicating the core logic design.
Data Source
AI summary
A flash memory apparatus is provided. In one embodiment, the flash memory apparatus with a plurality of operation states is coupled to a host and includes a controller having an engine and a register array. A state machine logic circuit of the engine is provided for transition of the operation states and the register array provides state transition information. When a command is received from the host, the engine obtains the state transition information from the register array according to a first operation state and determines whether the valid command is one of a plurality of valid commands corresponding to the first operation state. The state machine logic circuit determines transition to the operation states according to the state transition information. The transition of the first operation state to the second operation state is performed in response to the valid command.