Flash Memory Controller Stress Calculation Wear Leveling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Flash memory devices have limited program/erase cycles and do not support overwrite or in-place updating, leading to a limited lifespan, necessitating a method to secure reliability through wear-leveling.

Innovation Solution

A data storage device with a controller that calculates a stress value for each memory block based on erase completion and suspend counts, minimizing stress variation and extending lifespan by managing wear levels and interruptions during erase operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wear-leveling scheme is used to level the number of erase operations, then reliability is improved, but device complexity increases

Engineering Contradiction:
ImprovereliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter tracking from simple erase completion counting to dual-parameter counting (erase completion count + erase suspend count). This allows the system to account for partial erase operations that were interrupted, providing a more accurate representation of actual wear stress without requiring complex hardware modifications.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The controller continuously monitors and updates stress values based on erase operation history, creating a feedback mechanism that dynamically adjusts wear-leveling decisions. This feedback loop uses the calculated stress values to make informed block selection for future erase operations, improving reliability through adaptive management.

Inventive Principle:
Principle #23Feedback

2Productivity

If erase operations are suspended due to interruptions, then productivity is reduced, but stress variation on memory blocks increases

Engineering Contradiction:
ImproveproductivityVSAvoidstress variation
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The system performs preliminary counting of erase suspend events before they complete. By tracking interrupted erase operations in advance, the controller can compensate for the incomplete wear distribution that would otherwise occur, ensuring that stress is more evenly distributed across all blocks even when interruptions happen.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent prepares for potential interruptions by maintaining separate counts for completed and suspended erase operations. This cushioning approach allows the system to recover from interruptions and rebalance wear distribution, preventing stress concentration on specific blocks that would occur without such preparation.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Device complexity

If simple erase count tracking is used, then device complexity is reduced, but measurement precision of stress applied to blocks deteriorates

Engineering Contradiction:
Improvedevice complexityVSAvoidstress measurement precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent transitions from tracking a single erase completion parameter to tracking two parameters (erase completion count and erase suspend count). This parameter expansion provides more precise measurement of actual stress experienced by each block while maintaining implementation simplicity through straightforward counter increments and additions.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11467747B2Data storage device and operating method thereof
Publication Date: 2022.10.11 SK HYNIX INC
  • US11467747B2 patent drawing
  • US11467747B2 patent drawing
  • US11467747B2 patent drawing

AI summary

A data storage device includes storage including a plurality of memory blocks and a controller configured to control operations of the plurality of memory blocks. The controller is configured to calculate a stress value of each of the plurality of memory blocks based on an erase completion count and an erase interruption count of the corresponding memory block.