Flash Memory Controller Tag-Based Error Correction

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Solution Overview

Problem

FLASH memory operations are prone to errors due to disruptions in the mapping between read and write operations during power failures or reset processes, especially when transitioning between single-level and multi-level cell states.

Innovation Solution

A data storage device comprising a FLASH memory and a controller that performs error checking and correction based on different storage type system information, ensuring accurate data retrieval regardless of the recognition criterion used, by storing and programming system information using distinct techniques for single-level and multi-level cell states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a voltage reference is adopted for data recognition in FLASH memory, then data retrieval speed is improved, but operation errors occur when power failure or reset disrupts the mapping between read and write operations

Engineering Contradiction:
Improvedata retrieval speedVSAvoidoperation accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by storing a tag value in advance that indicates the storage type (SLC or MLC) before power failure or reset can occur. This tag value is retrieved first during system initialization to determine which voltage reference to use, ensuring the correct recognition criterion is applied without requiring the actual read/write mapping to be intact. This preliminary retrieval of the tag resolves the contradiction by enabling fast data recognition while preventing operation errors through advance preparation of the storage type information.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If different voltage references are used for SLC and MLC storage types, then data recognition accuracy is improved, but system complexity increases due to multiple recognition criteria

Engineering Contradiction:
Improvedata recognition accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary tag value that mediates between the two different storage types (SLC and MLC). Instead of directly implementing complex switching logic for multiple voltage references, the tag value serves as an intermediary indicator that simplifies the system's decision-making process. The controller reads this tag first and then selects the appropriate voltage reference (Vref_SLC or Vref_MLC) based on the tag value, thereby maintaining high recognition accuracy while reducing system complexity through this intermediary mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If the FLASH memory is programmed to support multi-level cells, then storage capacity is improved, but error susceptibility increases during power failure events

Engineering Contradiction:
Improvestorage capacityVSAvoiderror susceptibility
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies segmentation by separating the storage type identification function from the actual data storage function. The tag value is stored separately in a dedicated location (such as a specific block or page) to indicate whether the FLASH memory is operating in SLC or MLC mode. This segmentation allows the system to quickly retrieve the storage type information without reading the actual data, thereby reducing error susceptibility during power failure events while maintaining the high storage capacity benefits of MLC operation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9170937B2Data storage device and operating method for flash memory
Publication Date: 2015.10.27 SILICON MOTION INC
  • US9170937B2 patent drawing
  • US9170937B2 patent drawing
  • US9170937B2 patent drawing

AI summary

A data storage device and an operating method for a FLASH memory are disclosed. The disclosed data storage device includes a FLASH memory and a controller. The FLASH memory provides a storage space which is stored with a first storage type system information and a second storage type system information. Data recognition for the first storage type system information is stricter than that of the second storage type information. The controller reads the storage space of the FLASH memory and performs an error checking and correction process on data read from the storage space, and, based on the storage type system information, among the first and second storage type information, which first passes the error checking and correction process, the controller operates the FLASH memory.