Flash Memory Controller Temporary Block for Small Data Writes
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Solution Overview
Problem
The growth in capacity of flash memory leads to larger erase blocks, resulting in decreased writing performance due to frequent data copying in flash memory, especially when writing small-sized random data like diversified management information, and the complexity of controlling multivalued memory cells complicates reliability, requiring multiple writes to be avoided.
Innovation Solution
A memory controller is introduced to manage data writing in a non-volatile memory device by utilizing a temporary block for writing data smaller than a predetermined unit, reducing data copying between recording areas and accelerating the writing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the capacity of flash memory is increased, then the storage capacity is improved, but the writing performance deteriorates due to frequent data copying
Solution Approach 1:
The flash memory is divided into multiple blocks (first block, second block, third block) with different functions. The first block stores original data, the second block stores copied data, and the third block stores management information. This segmentation allows small data writes to be directed to appropriate blocks without requiring frequent copying between blocks, thus maintaining writing performance while preserving increased storage capacity.
2Quantity of substance
If the erase block size is increased to support larger capacity, then the storage capacity is improved, but the writing performance deteriorates due to frequent copying of small data
Solution Approach 1:
Different blocks are assigned different local qualities/functions tailored to specific data types. The first block is optimized for large data storage, the second block for small frequent writes, and the third block for management information. This local quality differentiation allows small management data to be written efficiently to the second block without affecting the larger erase block structure needed for high capacity storage.
3Ease of operation
If diversified management information is added to facilitate data management, then the ease of operation is improved, but the writing frequency increases causing performance deterioration
Solution Approach 1:
Management information is extracted from the main data storage area and placed in a dedicated third block. This separation allows management data to be written and updated independently without affecting main data storage operations. The third block can be optimized specifically for frequent small writes of management information, maintaining ease of data management while preventing performance deterioration.
4Quantity of substance
If multivalued memory cells are used to increase capacity, then the storage capacity is improved, but the reliability deteriorates due to complex control requirements
Solution Approach 1:
The memory system is segmented into multiple blocks with different access patterns and management strategies. By distributing data across first, second, and third blocks, the system can implement more conservative write strategies for critical data in the multivalued memory cells, reducing the number of rewrites and stress on individual cells, thus improving reliability while maintaining high capacity.
Data Source
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AI summary
A nonvolatile memory device (101) includes a plurality of physical blocks, each of which is provide with a nonvolatile memory (103), a logic/physical address conversion table, a temporary block and a temporary table. The nonvolatile memory (103) includes a plurality of pages which are predetermined writing units, respectively. The logical-physical address conversion table (106) stores correspondence information between logic addresses and physical addresses of data to be stored in the physical blocks. The temporary block is a physical block to store data that are smaller in size than those of the page. The temporary table (107) stores correspondence information between logic addresses and physical addresses with respect to data to be stored in the temporary block.