Flash Memory Controller Multi-Plane Data Toggle Command

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Solution Overview

Problem

Conventional flash memory devices require complex command sequences and longer waiting times for multiple plane operations due to the need for separate read commands for each plane, complicating data communication between the flash memory device and controller.

Innovation Solution

A flash memory device and controller system with an I/O control circuit, command register, memory cell array, and control circuit that performs a data toggle operation to sequentially transmit data units from multiple planes using a single command sequence, simplifying the communication process and reducing waiting times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple separate read commands are sent to read data from multiple planes, then data can be read from each plane, but the command sequence becomes complex and waiting time increases

Engineering Contradiction:
Improvedata reading efficiencyVSAvoidcommand sequence complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple separate read commands into a single read command that can simultaneously access multiple planes. The controller sends one command that includes addresses for multiple planes, and the flash memory device returns data from all requested planes in a single data return phase, eliminating the need for sequential command issuance and reducing overall operation time

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The flash memory device is designed with multi-plane capability where a single read command structure can address multiple planes universally. The command format includes plane address fields that can specify different planes, allowing the same command template to function across multiple planes without requiring plane-specific command variations

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple separate read commands are sent to read data from multiple planes, then data can be read from each plane, but waiting time period increases

Engineering Contradiction:
Improvedata reading speedVSAvoidwaiting time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent enables continuous data retrieval from multiple planes by initiating a single command that triggers parallel or pipelined data retrieval operations across multiple planes. The controller can continuously receive data from different planes without idle waiting periods between commands, maximizing the utilization of the data bus and reducing total operation time

Inventive Principle:
Principle #20Continuity of useful action

3Device complexity

If a single command sequence is used to access multiple planes, then command complexity is reduced, but data from different planes must be sequentially transmitted

Engineering Contradiction:
Improvecommand sequence complexityVSAvoiddata transmission speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent implements periodic data transmission where the flash memory device systematically returns data from multiple planes in a predetermined sequence. After transmitting data from one plane, the device automatically transitions to the next plane in the sequence, providing rhythmic and predictable data flow that simplifies controller timing requirements while maintaining efficient throughput

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11972146B2Flash memory controller and method capable of sending read command or data toggle command to ask for flash memory device return more plane data of different planes
Publication Date: 2024.04.30 SILICON MOTION INC
  • US11972146B2 patent drawing
  • US11972146B2 patent drawing
  • US11972146B2 patent drawing

AI summary

A method of a flash memory controller includes: providing an input/output (I/O) circuit coupled to a flash memory device through a specific communication interface; and, controlling a processor sending a specific read command or a data toggle command through the I/O circuit and the specific communication interface into the flash memory device, to make the flash memory device perform a data toggle operation to control the flash memory device's data register selecting and transferring a first data unit and a second data unit to the flash memory device's I/O control circuit to make the I/O control circuit sequentially transmit the first data unit and the second data unit to the flash memory controller through the specific communication interface in response to the specific read command or the data toggle command.