Flash Memory Controller Write Speed via Child Block Segmentation

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Solution Overview

Problem

The repeated data merging and erasing operations in flash memory storage systems prolong the time for executing write commands, reducing the performance of the system when updating data in the same logical page.

Innovation Solution

A data writing method that groups physical blocks into a data area and a free area, allowing for the selection of a child physical block from the free area to store update data, reducing the need for immediate data merging and erasing, and optimizing the writing process by using a special sequential writing mode for continuous logical pages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data merging and erasing operations are executed repeatedly for updating the same logical page, then data integrity is maintained, but the time for executing write commands is prolonged and system performance is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidwrite command execution time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-positioning valid data from the mother physical block into the child physical block before the actual write operation completes. This allows the system to prepare data in advance, so when updates are needed, the data merging process has already been partially completed, reducing the time required for subsequent write operations while maintaining data integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the physical block management into mother physical blocks and child physical blocks, allowing independent handling of data validation and merging operations. This segmentation enables the system to process data in smaller, manageable units rather than requiring complete block erasure and rewriting, thereby reducing overall write command execution time while preserving data reliability.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If data merging procedure is executed to merge valid data from mother physical block and child physical block, then data is consolidated, but the number of operations increases and writing speed decreases

Engineering Contradiction:
Improvedata consolidationVSAvoiddata writing speed
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent implements partial action by performing data merging only for the specific logical pages that require updates, rather than consolidating entire physical blocks. This selective approach merges only the necessary portions of data, reducing the total number of operations required while maintaining ease of data consolidation for the affected pages, thereby improving overall writing speed.

Inventive Principle:
Principle #16Partial or excessive action

3Adaptability or versatility

If physical blocks are frequently alternated between data area and free area, then storage flexibility is improved, but the complexity of block management increases

Engineering Contradiction:
Improvestorage flexibilityVSAvoidblock management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary mechanism through the child physical block that mediates between the mother physical block and the free area. This intermediary structure simplifies block management by providing a buffer zone where data can be temporarily staged during transitions between data area and free area, reducing the complexity of direct block alternation while maintaining storage flexibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8589620B2Data writing method, memory controller, and memory storage apparatus
Publication Date: 2013.11.19 PHISON ELECTRONICS
  • US8589620B2 patent drawing
  • US8589620B2 patent drawing
  • US8589620B2 patent drawing

AI summary

A data writing method for a rewritable non-volatile memory module is provided. The method includes receiving at least one update data, wherein the update data belongs to at least one logical page of a first logical block, and the first logical block is mapped to a first physical block. The method also includes when a physical page of a second physical block that is corresponding to the logical page already stores data, selecting a third physical block from a free area, writing the update data into the third physical block, serving the third physical block as the child physical block of the first physical block, and executing an erasing operation on the second physical block, wherein the second physical block is currently a child physical block of the first physical block. Thereby, the method can effectively reduce the number of operations for merging data and increase the data writing speed.