Flash Memory Data Arrangement for Access Performance
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Solution Overview
Problem
Flash memory access performance is limited by its sequential data access feature and lacks efficient error coverage, leading to unnecessary data sector and correction set accesses, which wastes time and space, and current error correction algorithms are inefficient for detecting multiple bit errors.
Innovation Solution
A data arrangement method where each data sector is stored contiguously with its corresponding error correction set, allowing direct access and division of error correction sets into sub-sets for enhanced error detection, reducing unnecessary accesses and improving error coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data sectors and data correction sets are arranged oppositely (conventional arrangement), then error correction can be performed, but unnecessary data sectors and correction sets must be accessed due to sequential access feature, wasting time and buffer space
Solution Approach 1:
The patent divides each page into multiple groups, where each group contains a data sector and its corresponding data correction set arranged adjacently. This segmentation allows the system to access only the specific data sector and its matching correction set without retrieving unnecessary data, thereby reducing access time while maintaining error correction capability.
Solution Approach 2:
The patent changes the arrangement from a linear sequential layout to a grouped dimensional structure where data sectors and correction sets are paired within groups. This dimensional reorganization enables direct access to specific groups containing only the required data and correction sets, eliminating the need to access unrelated data in conventional sequential arrangements.
2Device complexity
If conventional data arrangement is used, then simple structure is maintained, but data access performance cannot be improved without partial read/write functions
Solution Approach 1:
By segmenting the page into groups with adjacent data sectors and correction sets, the patent enables partial read operations at the group level. This segmentation provides partial read/write functionality without requiring complex hardware modifications, thus improving data access performance while keeping the structure relatively simple.
3Device complexity
If error correction sets are not divided, then simple processing is used, but error coverage rate is limited to one bit error per correction set
Solution Approach 1:
The patent divides each data correction set into multiple data correction sub-sets, where each sub-set can independently detect errors in corresponding sub-sectors. This segmentation increases the error coverage rate from one bit per correction set to multiple bits per original correction set, while maintaining relatively simple processing through parallel sub-set operations.
4Reliability
If data correction sets are divided into sub-sets, then error coverage rate increases, but processing complexity increases
Solution Approach 1:
The patent segments correction sets into sub-sets that correspond to adjacent data sub-sectors within the same group. This spatial segmentation allows parallel error detection across multiple sub-sets, increasing overall error coverage while distributing processing complexity across independent sub-sets rather than requiring complex sequential processing.
Data Source
AI summary
The disclosure relates to a data arranging method of a flash memory for improving access performance. The method includes steps of storing a first data sector to a page of the flash memory; storing a first data correction set corresponding to the first data sector in the page of the flash memory, wherein the first data correction set is next and contiguous to the first data sector; and repeating the two storing steps for storing a plurality of data sectors and a plurality of corresponding data correction sets until the page is formed.