Flash Memory Data Length Table for EEPROM Replacement

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Solution Overview

Problem

The high cost and inefficiency of using both flash memory and EEPROM in semiconductor devices, where flash memory requires data to be erased in blocks, limiting its functionality as a substitute for EEPROM.

Innovation Solution

A semiconductor device with a flash memory system that uses a controller to manage data by storing identifiers and data lengths in a data length table, allowing for the creation of new sections in blocks for writing data and efficiently accessing and updating data, mimicking EEPROM functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If both flash memory and EEPROM are installed in a semiconductor device, then data storage functionality is improved, but device cost increases significantly

Engineering Contradiction:
Improvedata storage functionalityVSAvoiddevice cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The flash memory is designed to perform both flash memory operations and EEPROM operations. The controller can switch between flash memory mode and EEPROM mode based on the operation type, allowing a single memory device to replace what would traditionally require two separate memory devices (flash memory and EEPROM), thereby reducing cost while maintaining full functionality

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory device dynamically switches between different operational modes (flash memory mode and EEPROM mode) based on the type of operation required. The controller adapts the memory access method, erasure method, and write method according to whether the operation is flash-specific or EEPROM-like, enabling one device to fulfill multiple roles

Inventive Principle:
Principle #15Dynamics

2Ease of manufacture

If flash memory is used as EEPROM, then device cost is reduced, but write operation complexity increases due to block erasure requirements

Engineering Contradiction:
Improvedevice costVSAvoidwrite operation complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The flash memory is divided into multiple blocks, and the controller manages these blocks to simulate EEPROM-like byte-level or word-level write operations. By segmenting the flash memory into erasable blocks and managing free areas within blocks, the system can perform incremental writes without erasing entire blocks, reducing write operation complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The controller acts as an intermediary between the host and the flash memory, translating high-level write requests into appropriate flash memory operations. It manages the data length table, tracks free areas, and coordinates between the host and flash memory to handle writes efficiently without requiring full block erasures for every write operation

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If flash memory requires block erasure for writing, then data integrity is maintained, but write time increases and productivity decreases

Engineering Contradiction:
Improvedata integrityVSAvoidwrite speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary actions by maintaining a data length table that records the size of each data item and by tracking free areas in advance. This allows the controller to plan write operations efficiently, allocating space before writes occur and avoiding the need for frequent block erasures, thereby improving write speed while maintaining data integrity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes operational parameters dynamically based on the operation type. For EEPROM-like operations, it uses smaller erasure units and incremental write methods rather than full block erasures. The controller adjusts the erasure granularity and write strategy based on whether the operation requires flash memory semantics or EEPROM semantics, improving productivity for EEPROM-like operations

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7610436B2Semiconductor device having flash memory with a data length table
Publication Date: 2009.10.27 RENESAS ELECTRONICS CORP
  • US7610436B2 patent drawing
  • US7610436B2 patent drawing
  • US7610436B2 patent drawing

AI summary

A semiconductor device includes a flash memory having a plurality of blocks; a controller configured to be accessible to the flash memory; and a data length table configured to store an identifier indicating a kind of each of a plurality of data and a data length of the data. A specific block as one of the plurality of blocks stores the plurality of data and identifiers for the plurality of data. The specific block may have a plurality of continuous sections, and each of the plurality of sections may store one of the plurality of data and one of the identifiers for the data.