Flash Memory Data Processor for Over-Programming Prevention

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Solution Overview

Problem

Flash memory devices face the challenge of over-programming, which can deteriorate memory cell integrity, particularly when programming '0' into cells that already store '0', leading to prolonged processing times due to the need for time-consuming data comparisons during embedded program operations.

Innovation Solution

The proposed solution involves processing input data units based on array data units as soon as they are received, generating processed data units that only program '0' into memory cells that store '1', thereby avoiding over-programming by comparing and processing data in real-time before the embedded program operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data comparison is performed during embedded program operation to prevent over-programming, then memory cell integrity is maintained, but programming time is prolonged

Engineering Contradiction:
Improvememory cell integrityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing data comparison and generating processed data units before the embedded program operation. The control unit compares input data units with array data units during the read operation phase, generates processed data units that indicate which memory cells require programming, and stores these processed data units in a data register. This preliminary processing eliminates the need for time-consuming data comparisons during the actual program operation, thereby maintaining memory cell integrity while significantly reducing programming time.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data comparison is performed during embedded program operation, then over-programming is prevented, but processing efficiency decreases

Engineering Contradiction:
Improveprevention of over-programmingVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The control unit performs the harmful data comparison operation in advance during the read phase, generating processed data units that identify which memory cells need programming. These processed data units are stored in a data register and used directly during the program operation without requiring additional comparison steps. This preliminary action prevents over-programming while maintaining high processing efficiency during the actual programming phase.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces processed data units as an intermediary between the input data units and the program operation. The processed data units serve as a mediator that encapsulates the result of data comparison, indicating which memory cells require programming. This intermediary eliminates the need for real-time data comparison during programming, thereby preventing over-programming while maintaining high processing efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If real-time data processing is performed upon receiving input data units, then programming time is reduced, but system complexity increases

Engineering Contradiction:
Improveprogramming timeVSAvoiddata processing complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the programming process into distinct phases: a read phase where input data units are received and compared with array data units to generate processed data units, and a program phase where the processed data units are used to program memory cells. The control unit is divided into functional components that handle data reception, comparison, processed data unit generation, and program operation control. This segmentation enables real-time data processing that reduces programming time while organizing system complexity into manageable functional modules.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10152276B2Memory device including data processor and program method of same
Publication Date: 2018.12.11 WINBOND ELECTRONICS CORP
  • US10152276B2 patent drawing
  • US10152276B2 patent drawing
  • US10152276B2 patent drawing

AI summary

A memory device includes a memory array including a plurality of memory cells that store data, a sense circuit coupled to the memory array for reading data stored in the memory array, a data register for storing data to be written into the memory array, a data processor, and a control unit. The data processor is configured to receive input data units to be written into the memory array, and process the input data units based on array data units stored in the memory array to generate processed data units. The control unit is configured to write the processed data units into the memory array.