Flash Memory Read-Retry Optimization via Periodic Data Refresh
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Solution Overview
Problem
Flash memory devices experience errors due to insufficient lifespan and data retention issues, leading to increased latency and inefficiency in read-retry operations as they require adjustments in read voltage, which are influenced by programming/erasing cycles and data storage time.
Innovation Solution
A method that periodically refreshes data in flash memory units to maintain data retention within a small range, reducing the adjustment range for read voltage and implementing an error check mechanism to conditionally refresh memory units with high error rates, thereby optimizing read-retry operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the controller constantly performs read-retry operations with voltage adjustments to handle errors from increased erase times and data retention issues, then data reading correctness is improved, but reading latency increases and efficiency decreases
Solution Approach 1:
The patent performs preliminary actions by periodically refreshing data in flash memory units before read operations are needed. The controller monitors data retention status and proactively reprograms data to newer memory units, preventing degradation-induced errors before they occur. This eliminates the need for reactive read-retry operations, thereby reducing reading latency while maintaining data correctness.
Solution Approach 2:
The patent skips the time-consuming read-retry process with voltage adjustments by implementing a refresh mechanism that prevents errors in the first place. Instead of repeatedly attempting to read degraded data with adjusted voltages, the system rushes through the problem by proactively migrating data before degradation occurs, thus avoiding the latency associated with multiple read attempts.
2Reliability
If the controller uses combinations of different read voltages for read-retry operations to handle various error conditions, then data reading correctness is improved, but the complexity of the read operation increases
Solution Approach 1:
The patent extracts the complexity of voltage adjustment and read-retry logic from the read operation by implementing a separate refresh mechanism. The controller monitors data retention and proactively refreshes data in memory units, removing the need for complex voltage combination strategies during read operations. This separates the reliability assurance function into a distinct preprocessing step.
Solution Approach 2:
The refresh mechanism serves itself by autonomously monitoring data retention status and initiating refresh operations without requiring complex read-retry logic. The system self-manages data integrity by tracking erase counts and data age, automatically refreshing data before degradation occurs, thereby simplifying the overall read operation complexity.
3Productivity
If data is stored in flash memory units for extended periods without updates, then storage capacity utilization is improved, but data retention problems increase and error rates rise
Solution Approach 1:
The patent implements periodic action by systematically refreshing data in flash memory units at scheduled intervals based on monitored retention status. The controller periodically assesses data age and erase cycle counts, then proactively reprograms data to newer memory units before degradation occurs. This periodic refresh maintains high storage utilization while preventing data retention errors.
Solution Approach 2:
The system employs feedback by continuously monitoring data retention status, erase cycle counts, and memory unit health metrics. Based on this feedback, the controller dynamically determines when and where to refresh data, optimizing the balance between storage utilization and data retention. The feedback loop ensures data is refreshed based on actual degradation risk rather than fixed schedules.
Data Source
AI summary
The present invention proposes a method for managing a plurality of memory units in a flash memory module. The method includes: creating a programed timestamp corresponding to each first memory unit according to a data-written time of said each first memory unit; selecting a corresponding read-retry table for performing a read operation upon said each first memory unit according to the programed timestamp of said each first memory unit; and performing a first refresh operation according to program timestamps of first memory units that have been written with data.