Flash Memory DBM Host Buffering
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Solution Overview
Problem
The limited memory space in flash memory devices restricts the size of management tables and buffered data, leading to increased manufacturing costs and product dimensions when attempting to address this limitation with larger RAM.
Innovation Solution
A method and system that utilize a Device Bus Master (DBM) request mechanism to dynamically access the internal temporary memory of a host device for buffering management tables and data, allowing the flash memory device to extend its memory space without increasing physical dimensions or costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a larger RAM is adopted to increase the memory space for buffering management tables and data, then the memory capacity is improved, but the manufacturing cost and product dimensions increase
Solution Approach 1:
The patent merges the flash memory device's temporary memory with the host device's internal temporary memory by establishing a device bus master (DBM) connection. This allows the flash memory device to access and utilize the host's memory space, effectively combining two separate memory resources into a unified buffer system, thereby increasing memory capacity without adding more RAM to the flash memory device itself
Solution Approach 2:
The host device's internal temporary memory serves multiple functions: it acts as both the host's own buffer and simultaneously serves as an extended buffer for the flash memory device. This multi-functionality allows the same memory resource to benefit both devices, eliminating the need for dedicated additional RAM in the flash memory device
2Quantity of substance
If a larger RAM is adopted to increase the memory space for buffering management tables and data, then the memory capacity is improved, but the product dimensions increase
Solution Approach 1:
The patent merges the flash memory device's temporary memory with the host device's internal temporary memory by establishing a device bus master (DBM) connection. This allows the flash memory device to access and utilize the host's memory space, effectively combining two separate memory resources into a unified buffer system, thereby increasing memory capacity without adding more RAM to the flash memory device itself
Solution Approach 2:
Instead of expanding memory capacity within the same physical device (horizontal expansion), the patent extends memory access into a new dimension by utilizing the host device's memory space through the DBM interface. This dimensional shift allows the flash memory device to access external memory resources without increasing its own physical volume
3Quantity of substance
If the flash memory device accesses the host device's temporary memory through DBM mechanism, then the memory capacity is improved, but the device complexity increases
Solution Approach 1:
The flash memory device autonomously manages its own memory buffering needs by implementing the DBM request mechanism. The device independently determines when to access the host's temporary memory, manages its own data transfer operations, and controls the buffering process without requiring complex external coordination or additional control circuitry in the host device
Data Source
AI summary
Data storage system and management method thereof are provided. The method, adopted by a data storage device coupled to a host device via a bus, includes: determining the data storage device requires to use a first temporary memory of the host device to access data in a second temporary memory of the data storage device; based on the determination, issuing a Device Bus Master (DBM) request message via the bus to the host to request for a right to control data transfer on the bus; in response to the DBM request message, detecting the bus to determine whether to receive a first DBM acknowledgement message from the host device; and if the first DBM acknowledgement message is received, then accessing the first temporary memory of the host device.