Flash Memory Die Failure Detection via Dual Status Checks

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Solution Overview

Problem

Flash memory devices face challenges in accurately detecting die failure, particularly when the data strobe signal (DQS) is floating due to unresponsive dies, leading to potential false detection and increased power consumption when using DQS bias resistors.

Innovation Solution

Implementing a method that sends two successive check status commands to determine the status of flash memory devices, comparing the first and second status signals to accurately flag die failure, and using status registers to store operation-specific information for enhanced detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single check status command is sent to detect die failure, then the detection process is simple and fast, but false detection occurs when the DQS signal is floating due to unresponsive dies

Engineering Contradiction:
Improvedie failure detection accuracyVSAvoidstatus check process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing a first status check before the DQS signal becomes unreliable, then performing a second status check after the DQS signal becomes unreliable. This timing-based preliminary checking allows the system to capture the die's operational state at different phases, improving detection accuracy without requiring complex additional hardware.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the status detection process into two distinct phases: a first status check performed when the DQS signal is still reliable, and a second status check performed when the DQS signal becomes unreliable. By dividing the detection process into segments with different timing characteristics, the system can compare results to distinguish between temporary signal issues and actual die failure.

Inventive Principle:
Principle #1Segmentation

2Reliability

If DQS bias resistors are used to detect die failure, then failure detection capability is improved, but power consumption increases

Engineering Contradiction:
Improvedie failure detection capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the timing information from the status signals without requiring continuous DQS signal monitoring or bias resistors. By analyzing the timing characteristics of status responses at different phases of operation, the system achieves reliable die failure detection while eliminating the need for power-consuming bias resistor circuits.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the electrical mechanism of DQS bias resistors with a temporal analysis mechanism. Instead of using electrical components to force signal levels, the system uses timing-based status checks to infer die health, substituting a power-consuming electrical solution with a power-efficient temporal analysis approach.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If status checking is performed continuously, then detection accuracy is improved, but the time required for operation increases

Engineering Contradiction:
Improvestatus detection accuracyVSAvoidtime for status checking
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements periodic action by performing status checks at two specific periods: once before the DQS signal becomes unreliable and once after it becomes unreliable. This periodic sampling at critical moments provides sufficient detection accuracy without requiring continuous monitoring, thereby minimizing time loss while maintaining high detection precision.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10984882B2Run-time memory device failure detection enhancement
Publication Date: 2021.04.20 SANDISK TECHNOLOGIES LLC
  • US10984882B2 patent drawing
  • US10984882B2 patent drawing
  • US10984882B2 patent drawing

AI summary

The subject technology provides implementations, which may be included as part of firmware of the flash memory device, that will not solely rely on a flash controller interpreted status but includes additional checks to the returned flash status byte. Each flash read, write, and erase command requires a status read command to determine the state of operation. Depending on the particular command issued, each bit of the returned status has a different meaning. The flash memory device firmware can check whether an illogical or inconsistent status is present. For example, if an overall pass/fail bit indicates a “pass” but a plane pass/fail bit indicates a “fail” then there could be an erroneous detection. Also, for every operation, the firmware can read status twice when the flash memory is ready. If the second status byte fails to match the first status byte then a die may be flagged as failing.