Charge Trapping Flash Memory Annealing
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Solution Overview
Problem
Advanced flash memory technologies, such as BE-SONOS, face limitations in endurance and operation speed compared to other memory types, necessitating improvements in erase speed and endurance.
Innovation Solution
Thermal annealing of dielectric charge trapping structures during negative gate voltage erase operations, with the bit line and common source line biased with a positive erase voltage, enhances erase speed and endurance by repairing damage from program and erase cycling, and assisting electron de-trapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If thermal annealing is applied during erase operations, then erase speed is improved, but device complexity increases
Solution Approach 1:
The memory device uses its own bit lines and word lines to generate the thermal energy required for annealing, eliminating the need for external heating equipment. The write operations themselves generate the heat needed for both data programming and structural annealing, making the system self-sufficient.
Solution Approach 2:
The patent combines the write operation and annealing operation into a single integrated process. By applying voltage to bit lines and word lines during write operations, the system simultaneously programs data and performs thermal annealing on the tunnel dielectric layer, merging two previously separate functions into one unified operation.
2Reliability
If thermal annealing is applied during erase operations, then endurance is improved, but energy consumption increases
Solution Approach 1:
The energy required for annealing is obtained from the write operations themselves. The voltage applied to bit lines and word lines during programming generates Joule heating that is directly used for annealing the tunnel dielectric, eliminating the need for separate energy input and making the process energy-self-sufficient.
Solution Approach 2:
The patent converts the harmful effect of Joule heating (which was previously considered wasted energy causing degradation) into a beneficial thermal annealing effect. The heat that would normally be a byproduct of write operations is now harnessed to improve tunnel dielectric quality and extend device endurance.
3Temperature
If current is provided to bit lines to heat memory cells, then temperature is increased for defect identification, but power consumption increases
Solution Approach 1:
The bit lines and word lines serve multiple functions: they are used for normal read/write operations, for generating thermal energy during write operations, and for performing annealing. This multi-functionality eliminates the need for dedicated heating circuits and reduces overall power consumption by reusing existing infrastructure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly improves the endurance of flash memory devices to achieve over 1 million cycles and enhances erase performance by applying thermal annealing during erase operations, maintaining device performance over extended cycling.
Implementation Method 1
resources for thermally annealing dielectric charge trapping structures of memory cells on the device, wherein the thermally annealing is applied during a negative gate voltage erase, to improve an erase speed
Implementation Method 2
During an erase operation for example, thermal annealing can assist electron de-trapping, and thereby improve erase speed
Data Source
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AI summary
A memory device (410) includes an array (412) of memory cells with charge trapping dielectric structures including word lines and bit lines. Control circuitry coupled to the array is arranged to control read, program and erase operations. A controller (434) is arranged with supporting circuitry to thermally anneal the charge trapping structures in the memory cells in the array. Word line drivers (25) and word line termination circuits (27) can be used to induce current flow on the word lines to induce heat for the annealing. The thermal annealing can be applied interleaved with normal operations for recover from cycling damage. Also, the thermally annealing can be applied during mission functions like erase, to improve performance of the function.