Flash Memory Read Disturbance Mitigation via Buffer Copying

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Solution Overview

Problem

Flash memory devices experience read disturbance, leading to increased read error rates due to repeated read operations that alter the threshold voltage of memory cells, causing data loss and instability.

Innovation Solution

A memory system with a controller and buffer memory unit that determines the disturbance risk of memory blocks, stores data in the buffer memory unit, and copies data from high-risk blocks to other blocks when idle, preventing further access to the risk block.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If repeated read operations are performed on flash memory blocks, then data access speed is maintained, but read error rate increases due to threshold voltage transition

Engineering Contradiction:
Improvedata access speedVSAvoidread error rate
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The controller proactively identifies blocks at risk of read disturbance before actual errors occur by monitoring read counts and threshold voltage characteristics. When a block is identified as high-risk, the controller preemptively copies its data to a different block and invalidates the original block, preventing read errors before they happen while maintaining fast data access.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is copied from high-risk blocks to new blocks, then read disturbance is prevented, but write operations increase and storage efficiency decreases

Engineering Contradiction:
Improvedata integrityVSAvoidstorage efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The controller changes the state parameters of memory blocks by tracking read counts and threshold voltage shifts to identify when blocks become high-risk. This parameter-based monitoring enables selective copying only when necessary, balancing data integrity protection with storage efficiency by avoiding unnecessary write operations.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The controller creates copies of data from high-risk blocks to new blocks only when disturbance risk is detected, rather than continuously copying all data. This selective copying approach maintains data integrity while minimizing the impact on storage efficiency and write operation overhead.

Inventive Principle:
Principle #26Copying

3Reliability

If buffer memory unit is used to store data from high-risk blocks, then read errors are avoided, but system complexity and power consumption increase

Engineering Contradiction:
Improveread error preventionVSAvoidsystem architecture
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer memory unit serves as an intermediary between the flash memory blocks and the host system. When a block is identified as high-risk, the controller loads its data into the buffer memory unit, which then serves as the data source for host requests. This intermediary approach prevents read errors while managing system complexity through controlled buffer usage rather than continuous buffering of all data.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10942681B2Memory system and operation method thereof
Publication Date: 2021.03.09 SK HYNIX INC
  • US10942681B2 patent drawing
  • US10942681B2 patent drawing
  • US10942681B2 patent drawing

AI summary

A memory system includes a storage unit configured to include a plurality of memory blocks, a controller configured to read data from the memory block and to determine disturbance risk for the memory block, and a buffer memory unit configured to store the data read from the memory block and to provide the data to a host, wherein the controller is configured to control the buffer memory unit, in which the data read from the memory block is stored, based on the disturbance risk for the memory block.