Flash Memory Program Disturbance Mitigation via Correction Voltages
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Solution Overview
Problem
Flash memory devices face program disturbance issues between adjacent memory cells, leading to potential programming errors and unreliable data storage in multi-level cell flash memory systems.
Innovation Solution
A multilevel flash memory device with a control logic unit that adjusts program, verification, and read voltages for neighboring memory cells based on the state of a target memory cell, applying correction voltages to mitigate program disturbance by shifting threshold voltage distributions and ensuring accurate data retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard programming voltage is applied to neighboring memory cells, then programming speed is maintained, but program disturbance occurs causing programming errors in adjacent cells
Solution Approach 1:
The patent applies different programming voltages to different memory cells based on their spatial relationship to the target cell. Neighboring memory cells receive a first programming voltage that is lower than the second programming voltage applied to non-neighboring cells. This local differentiation prevents program disturbance in adjacent cells while maintaining efficient programming in distant cells, thus resolving the contradiction between reliability and productivity.
Solution Approach 2:
The patent implements preliminary protective action by detecting neighboring memory cells before programming the target cell and applying a reduced programming voltage to these neighbors in advance. This preliminary anti-action prevents program disturbance before it can occur, ensuring programming accuracy without significantly impacting overall programming speed.
2Measurement precision
If verification voltage is increased to ensure accurate reading, then reading accuracy improves, but device complexity increases due to multiple verification voltage levels
Solution Approach 1:
The patent changes the verification voltage parameter dynamically based on the program state of the memory cell. Different verification voltages are applied corresponding to different program states (e.g., SLC program state vs. MLC program states). This parameter adaptation ensures high reading accuracy for each state while managing device complexity through systematic voltage selection rather than arbitrary multiple voltage levels.
3Quantity of substance
If multiple programming states are used to increase storage capacity, then memory density improves, but program disturbance between adjacent cells increases
Solution Approach 1:
The patent applies different programming voltages based on the program state of neighboring memory cells. When a neighboring cell is in an SLC program state, a first (lower) programming voltage is applied; when in an MLC program state, a second (higher) programming voltage is applied. This local quality differentiation allows the system to maintain high storage capacity through multiple programming states while preventing program disturbance by adapting the programming voltage to the specific state of each neighboring cell.
Data Source
AI summary
Multilevel flash memory and methods of programming/reading flash memory are disclosed. The multilevel flash memory device comprises a status detector configured to detect whether or not a target memory cell is programmed to an erase state, and a control logic unit controlling a program voltage applied to a neighboring memory cell adjacent to the target memory cell and to be programmed to one of a plurality of standard program states, such that the neighboring memory cell is programmed to a corresponding one of a plurality of correction program states different from the one of the plurality of standard program states.