Flash Memory Power Management Circuitry with Dual Voltage Inputs

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Solution Overview

Problem

Conventional flash memory devices face inefficiencies in power conversion due to the need for charge pump circuits to generate multiple voltage levels from a single primary input voltage, which becomes less efficient as the voltage difference increases, and scaling down to lower voltages complicates the converter design and reduces performance.

Innovation Solution

A memory device with multiple power inputs, including a first voltage for powering the core memory and a second voltage that can be up- or down-converted by power management circuitry to generate internal voltages needed for operations, reducing the complexity and size of the converter circuitry and improving efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single primary input voltage is used with charge pump circuits to generate multiple voltage levels, then the memory device can operate with a simplified power input interface, but the power conversion efficiency decreases as the voltage difference increases and the converter circuitry becomes more complex

Engineering Contradiction:
Improveconverter circuitry complexityVSAvoidpower conversion efficiency
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent divides the power conversion function into two separate segments: (1) a charge pump circuit that generates a second voltage from the first voltage, and (2) a power converter circuit that generates internal voltages from the second voltage. This segmentation allows each circuit to operate in its optimal efficiency range, resolving the contradiction between converter complexity and power conversion efficiency by eliminating the need for a single complex high-ratio voltage converter.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a second voltage (Vpp) as an intermediary between the primary input voltage (Vcc) and the internal voltages required for memory operations. This intermediary voltage serves as a bridge that enables more efficient power conversion by reducing the voltage conversion ratio required from the power converter circuit, thereby improving overall power conversion efficiency while maintaining manageable circuit complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Use of energy by stationary object

If the primary input voltage is scaled down to lower voltages, then the memory device can operate at lower power consumption levels, but the converter design becomes more complex and performance is reduced

Engineering Contradiction:
Improvepower consumptionVSAvoidconverter design complexity
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The patent enables dynamic voltage selection by allowing the memory device to accept either a first voltage (Vcc) or a second voltage (Vpp) as input. The device can dynamically switch between single-power-supply mode and dual-power-supply mode based on operational requirements, providing flexibility to optimize between power consumption and performance without being constrained by fixed voltage levels.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter configuration by introducing an optional second voltage input that can be used in conjunction with or instead of the first voltage. This parameter change allows the system to operate in different voltage modes (single-supply or dual-supply) depending on whether priority is given to simplicity or to optimized performance and efficiency, thereby resolving the contradiction between low power consumption and converter design complexity.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If a higher input voltage is used for generating internal voltages, then the read/program/erase performance improves and operations become faster, but the power consumption increases

Engineering Contradiction:
Improvememory operation speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent implements dynamic power supply mode selection that allows the memory device to switch between single-power-supply mode and dual-power-supply mode. In dual-power-supply mode, a higher second voltage (Vpp) can be applied to the power converter circuit to enable faster read/program/erase operations when high performance is required, while in single-power-supply mode, lower power consumption is achieved using only the first voltage (Vcc). This dynamic switching capability resolves the contradiction between operation speed and power consumption.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances power conversion efficiency, reduces the size and complexity of the power management circuitry, and improves read/program/erase performance by using a higher input voltage for generating internal voltages, supporting faster memory operations.

Implementation Method 1

power management circuitry to convert the second voltage to one or more internal voltages that enable memory operations

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS11049574B2Non-volatile semiconductor memory having multiple external power supplies
Publication Date: 2021.06.29 MOSAID TECH
  • US11049574B2 patent drawing
  • US11049574B2 patent drawing
  • US11049574B2 patent drawing

AI summary

A memory device includes core memory such as flash memory for storing data. The memory device includes a first power input to receive a first voltage used to power the flash memory. Additionally, the memory device includes a second power input to receive a second voltage. The memory device includes power management circuitry configured to receive the second voltage and derive one or more internal voltages. The power management circuitry supplies or conveys the internal voltages to the flash memory. The different internal voltages generated by the power management circuitry (e.g., voltage converter circuit) and supplied to the core memory enable operations such as read/program/erase with respect to cells in the core memory.