Flash Memory Retention via Dummy Data Isolation

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Solution Overview

Problem

Semiconductor memory devices, particularly flash memories, face challenges in maintaining data retention and reliability due to interference from adjacent memory blocks during erase operations, which affects the retention characteristics of program data.

Innovation Solution

A semiconductor memory device with a memory cell array and peripheral circuit capable of performing erase and program operations, including a control logic that erases all memory blocks and programs them with dummy data, thereby isolating program data and improving retention characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If erase operation is performed on memory blocks, then data retention is improved, but interference from adjacent memory blocks worsens retention characteristics

Engineering Contradiction:

Improvedata retentionVSAvoidinterference from adjacent memory blocks

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a dummy data programming operation as an intermediary step between erase operations on adjacent memory blocks. This dummy programming creates a protective state that prevents interference during erase operations, thereby maintaining data retention characteristics while allowing erase operations to proceed on adjacent blocks.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary dummy programming operations on memory blocks before executing erase operations on adjacent blocks. This preliminary action prepares the memory blocks in a state that is resistant to interference during subsequent erase operations, thus preserving data retention while enabling the erase operation to complete successfully.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If dummy data programming is performed after erase, then data retention characteristics are improved, but operation time increases

Engineering Contradiction:

Improveretention characteristicsVSAvoidoperation time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by performing dummy programming only on specific memory blocks that require protection during erase operations, rather than uniformly on all blocks. This selective approach reduces the total operation time while still achieving the desired retention characteristics improvement where needed.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent integrates the dummy programming operation into the overall erase sequence in a continuous manner, where the dummy programming on one block occurs while other blocks are being erased or prepared. This continuous workflow minimizes idle time and reduces the overall operation time while maintaining the protective effect.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS9792992B1Semiconductor device and operating method thereof

Publication Date: 2017.10.17 SK HYNIX INC

AI summary

The present disclosure relates to a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit: suitable for performing an erase operation and a program operation to the memory cell array, and a control logic suitable for controlling the peripheral circuit to erase all of the plurality of memory blocks and then to program the plurality of memory blocks with dummy data during the erase operation.