Flash Memory Read-Disturbance Detection Using Parallel Dummy Pages
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Solution Overview
Problem
Conventional flash memory devices face limitations in correcting bit errors due to read disturbance, where repetitive read operations can lead to increased threshold voltages, causing memory cells to be erroneously identified, and errors may exceed the correction capabilities of error detecting and correcting codes, especially when data is repeatedly accessed, such as in music files or game programs.
Innovation Solution
A method is introduced where a flash memory system reads data from a main page and a dummy page in parallel, using an ECC algorithm to detect bit errors, and if errors exceed the correction range, the memory controller maps addresses to another memory block, thereby correcting errors and preventing read failures by simulating read disturbance on the dummy pages, which are then used to detect and correct errors in the main pages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is repeatedly read from the same memory page, then data access efficiency is improved, but read disturbance occurs causing bit errors that exceed ECC correction capabilities
Solution Approach 1:
The system performs preliminary read operations on dummy pages before the main page to pre-induce read disturbance effects. By reading dummy pages that are subsequently programmed with complementary data, the system prepares the memory block to absorb additional read disturbance without causing bit errors in the main data page, thus maintaining data integrity while allowing repeated reads.
Solution Approach 2:
The system creates a copy of the data storage structure by introducing dummy pages that mirror the main page structure. These dummy pages are programmed with complementary data (inverted bits) and subjected to read operations first, thereby copying the read disturbance effect away from the main data page. This allows the main page to be read repeatedly without accumulating harmful disturbance.
2Reliability
If ECC correction capability is increased to handle read disturbance errors, then data reliability is improved, but device complexity and processing overhead increase
Solution Approach 1:
The system converts the harmful read disturbance effect into a beneficial preprocessing step by intentionally applying read operations to dummy pages first. This harmful disturbance is transformed into a protective mechanism that prevents worse disturbance effects on the main data page, reducing the burden on ECC circuits and simplifying the overall error handling complexity.
Solution Approach 2:
The dummy pages serve as intermediary elements between the read operation and the main data page. By introducing these intermediate pages that absorb the initial read disturbance, the system protects the main data page from direct exposure to cumulative disturbance effects, thereby reducing the correction burden on the ECC system.
3Reliability
If dummy pages are read in parallel with main page, then read disturbance is simulated and errors are detected early, but read time and energy consumption increase
Solution Approach 1:
The system performs preliminary reads on dummy pages before the actual main page read operation. This preliminary action simulates read disturbance in advance, allowing the system to detect potential error-prone memory blocks before accessing critical data, thereby improving reliability without significantly impacting overall system performance.
Data Source
AI summary
Methods and memory systems are provided that can detect bit errors due to read disturbances. A main page of a flash memory in a memory system is read. A bit error in data that is read from the main page is detected and corrected. In parallel with reading the main page, a bit error is detected in data that is read from a dummy page of the flash memory.