Multi-chip Flash Memory Package with Dynamic Cell Resolution
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Solution Overview
Problem
Current flash memory technologies face limitations in storing multiple bits of data per cell, leading to reduced storage density and increased error rates, especially in multi-level cell flash memory systems where voltage drift and sag can affect data integrity.
Innovation Solution
The implementation of a multi-level flash memory system that includes a NAND flash memory die and a flash disk controller, utilizing DRAM for temporary data storage, an analog interface with an ADC to convert analog voltage signals to digital data, and an error correction engine to manage and correct errors, allowing each flash memory cell to store at least four bits of data and dynamically adjust cell resolution based on usage and error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cell flash memory is used to increase storage density, then more bits per cell are stored, but voltage drift and sag cause increased error rates
Solution Approach 1:
The patent implements a feedback mechanism where the system continuously monitors voltage levels in flash memory cells and dynamically adjusts read thresholds and cell resolution. The controller reads reference cells to detect voltage drift, then adjusts the resolution of data cells accordingly, creating a closed-loop system that maintains data integrity despite voltage variations in multi-level cell flash memory
Solution Approach 2:
The patent applies dynamics by making the cell resolution adjustable rather than fixed. The system dynamically changes the resolution of flash memory cells from high (e.g., 4 bits per cell) to low (e.g., 1 bit per cell) based on detected voltage drift conditions, allowing the system to adapt its operation to maintain reliability while maximizing storage density when conditions permit
2Quantity of substance
If cell resolution is increased to store more data, then storage capacity increases, but error detection and correction becomes more difficult
Solution Approach 1:
The patent applies local quality by differentiating between reference cells and data cells in their function and resolution. Reference cells are maintained at a fixed, lower resolution specifically for voltage monitoring purposes, while data cells can operate at higher resolutions for maximum storage capacity. This local differentiation allows the system to monitor voltage drift accurately without compromising the storage capacity of data cells
Solution Approach 2:
The patent introduces reference cells as intermediary elements that mediate between the voltage drift phenomenon and the data storage function. These reference cells serve as sensors that indirectly measure voltage conditions, allowing the controller to adjust data cell operation without directly measuring the data itself, thereby simplifying error detection while maintaining high storage capacity
3Reliability
If dynamic resolution adjustment is implemented to maintain data integrity, then reliability improves, but device complexity increases
Solution Approach 1:
The patent segments the flash memory into distinct functional regions: reference cells dedicated to voltage monitoring and data cells dedicated to storage. This segmentation allows the complex task of maintaining data integrity to be handled by specialized reference cell measurements rather than requiring complex processing of all data cells, thereby improving reliability while managing device complexity through functional division
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances storage density, reliability, and reduces data error rates, while also enabling high-performance data storage operations and reduced electromagnetic noise, ultimately leading to lower system costs and improved noise margins.
Implementation Method 1
Typical flash memory stores a unit of information by storing an electrical charge in each memory cell at a voltage representative of a digital data value
Implementation Method 2
an analog interface with an ADC to convert analog voltage signals to digital data
Data Source
AI summary
An electronic system includes a flash memory die having multiple flash memory cells. Each flash memory cell is operable to store at least four bits of data. A second die includes a controller for accessing the flash memory cells. DRAM is used by the controller to temporarily store data. An interface is operable to send and receive signals associated with the flash memory cells to a host. A housing contains the flash memory die, the second die, the DRAM, and the interface.