Flash Memory ECC Coding for Multiple Sectors

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Solution Overview

Problem

Conventional flash memory devices face challenges in efficiently implementing error correction coding, especially in large-scale NAND flash memory systems where partial page programming is prohibited, leading to increased stress on memory cells and reduced reliability.

Innovation Solution

The solution involves combining data from all sectors of a page into a unitary data block for error correction coding, allowing for encoding based on the entire data block, which includes both user and control data, and decoding the entire page to select the desired sector data, thereby reducing the number of ECC bits required and improving error correction capability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction coding is applied to each sector individually, then error correction capability per sector is maintained, but the number of ECC bits required increases and memory space is wasted

Engineering Contradiction:
Improveerror correction capabilityVSAvoidnumber of ECC bits
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent combines multiple sector data blocks into a single unitary data block for error correction coding. Instead of applying ECC separately to each sector, the invention merges the data from all sectors in a page and applies a single ECC code across the entire combined block, thereby reducing the total number of ECC bits required while maintaining error correction capability across all sectors.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements a universal ECC approach where a single error correction code serves multiple sectors simultaneously. The ECC bits generated for the unitary data block provide error correction protection for all sectors within that block, making the ECC mechanism multi-functional rather than dedicated to individual sectors.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If partial page programming is allowed, then programming flexibility is improved, but memory cell stress increases and reliability decreases

Engineering Contradiction:
Improveprogramming flexibilityVSAvoidmemory cell stress
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent merges the programming operations of multiple sectors into a single page-wide programming operation. By requiring that all sectors in a page be programmed together as a unit, the invention eliminates the repeated programming stress that occurs with partial page programming, while still providing the flexibility to program entire pages when needed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent inverts the conventional approach by prohibiting partial page programming and requiring full page programming instead. This inversion eliminates the harmful effect of repeated programming on memory cells while maintaining system flexibility through the ability to program entire pages in a single operation.

Inventive Principle:
Principle #13The other way round (Inversion)

3Reliability

If more ECC bits are used, then error correction capability increases, but memory capacity for user data decreases

Engineering Contradiction:
Improvenumber of correctable errorsVSAvoiduser data capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent combines data from multiple sectors into a unitary block and applies ECC at the page level rather than the sector level. This merging approach reduces the total number of ECC bits required because the ECC code protects the entire page as a single unit, thereby increasing the proportion of memory available for user data while maintaining or improving overall error correction capability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7809994B2Error correction coding for multiple-sector pages in flash memory devices
Publication Date: 2010.10.05 SANDISK TECHNOLOGIES LLC
  • US7809994B2 patent drawing
  • US7809994B2 patent drawing
  • US7809994B2 patent drawing

AI summary

A flash memory system, including a flash memory device and a controller, and having improved efficiency error correction coding (ECC), is disclosed. Each page in the flash memory device has the capacity to store multiple sectors' worth of data. However, partial page programming (i.e., followed by a later write to fill the page) is prohibited for reliability reasons. A scratchpad block within the flash memory device is designed, and stores both user data and control data. ECC efficiency is improved by encoding the ECC, or parity, bits over the entire data block corresponding to the user and control data in the page. Retrieval of a particular sector of data requires reading and decoding of the entire page. Especially for codes such as Reed-Solomon and BCH codes, the larger data block including multiple sectors' data improves the error correction capability, and thus enables either fewer redundant memory cells in each page or improved error correction.