Flash Memory Read-Level Control Using ECC Feedback
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Solution Overview
Problem
Conventional flash memory read levels are fixed, leading to increased errors when threshold voltage distributions change, as they fail to adapt to variations in floating gate flash memories, resulting in suboptimal read levels and errors.
Innovation Solution
A read level control apparatus and method that includes an error control code (ECC) decoding unit, a monitoring unit to assess bit error rate (BER), an error determination unit to calculate error rates, and a level control unit to dynamically adjust the read level based on error rates, utilizing ECC decoding and syndrome analysis to optimize read levels and reduce errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If fixed read levels are used in flash memory, then device complexity is reduced, but error rate increases when threshold voltage distributions change
Solution Approach 1:
The patent implements dynamic read level adjustment by continuously monitoring bit error rates and adapting read levels based on threshold voltage distribution changes. The system transitions from static fixed read levels to dynamic adaptive read levels that automatically adjust to floating poly coupling effects and charge loss, thereby maintaining data read accuracy without requiring complex manual calibration procedures
Solution Approach 2:
The patent employs feedback mechanisms where bit error rates are monitored and used to adjust read levels in real-time. The system reads data at multiple read levels, calculates bit error rates for each level, and selects the optimal read level based on the lowest error rate. This closed-loop feedback system automatically compensates for threshold voltage shifts without increasing overall device complexity
2Reliability
If read levels are dynamically adjusted to adapt to threshold voltage changes, then data read accuracy improves, but device complexity increases
Solution Approach 1:
The patent implements self-service functionality where the flash memory system automatically monitors its own threshold voltage distribution changes and adjusts its read levels without external intervention. The built-in error monitoring and read level adjustment mechanisms enable the system to self-correct for floating poly coupling and charge loss effects, maintaining high data read accuracy while avoiding the need for complex external calibration equipment or manual adjustment procedures
Solution Approach 2:
The patent changes the operational parameters of the read system by introducing multiple read levels and dynamically selecting the optimal level based on monitored error rates. Instead of using a single fixed read level, the system implements a set of adjustable read levels and automatically selects the best one, thereby improving data read accuracy through parameter adaptation without requiring fundamentally new device architecture
Data Source
AI summary
Various read level control apparatuses and methods are provided. In various embodiments, the read level control apparatuses may include an error control code (ECC) decoding unit for ECC decoding data read from a storage unit, and a monitoring unit for monitoring a bit error rate (BER) based on the ECC decoded data and the read data. The apparatus may additionally include an error determination unit for determining an error rate of the read data based on the monitored BER, and a level control unit for controlling a read level of the storage unit based on the error rate.