Flash Memory Programming with ECC for Fast Reads and Over-Program Control
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Solution Overview
Problem
Flash memory devices face challenges in increasing programming rate while maintaining reliability, as existing methods can lead to over-programming, which causes data errors and impairs device reliability.
Innovation Solution
Implementing a method that differentiates between fast and normal programming modes by using multi-bit and single-bit Error Detection and Correction (ECC) engines, respectively, and adjusting program start voltages to minimize programming loops, thereby preventing over-programming and enhancing programming speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If incremental step-pulse programming (ISPP) mode is used to program flash memory cells, then programming accuracy is improved, but programming rate deteriorates due to the large number of incremental steps required
Solution Approach 1:
The patent applies dynamics by making the programming method adaptive rather than fixed. The system dynamically determines the optimal programming approach by evaluating the current state of memory cells and adjusting the number of programming loops and pulse characteristics accordingly. This allows the system to achieve high accuracy when needed while maintaining fast programming speed when conditions permit, resolving the contradiction between programming accuracy and programming rate.
2Productivity
If the number of incremental programming steps is reduced to increase programming rate, then productivity is improved, but over-programming occurs which deteriorates reliability
Solution Approach 1:
The patent implements feedback mechanisms where the programming process continuously monitors the state of memory cells and adjusts subsequent programming pulses based on this information. The system uses read-verify operations after programming attempts to detect over-programming conditions and triggers compensatory actions to correct threshold voltage shifts. This feedback loop ensures that programming rate can be increased without sacrificing reliability, as the system automatically prevents and corrects over-programming errors.
3Productivity
If fast programming mode is used to increase programming speed, then productivity is improved, but over-programming errors increase which worsens data integrity
Solution Approach 1:
The patent applies beforehand cushioning by implementing preventive measures before over-programming errors can occur. The system uses multi-bit ECC (Error Correction Code) engines that are specifically designed to detect and correct multiple bit errors that may arise from fast programming operations. Additionally, the system employs read-verify operations at critical points during the fast programming process to detect threshold voltage shifts before they result in data errors. These preventive mechanisms cushion against the inherent risks of fast programming, allowing high programming speeds to be maintained while preserving data integrity.
Data Source
AI summary
Disclosed are program and read methods for a nonvolatile memory system, including determining to program first data in which one of fast and normal modes; providing the first data with an error code generated by a multi-bit ECC engine, in the fast mode, and generating second data; programming the second data in a cell array by a program voltage having a second start level higher than a first start level; and reading the second data from the cell array, the second data being output after processed by the multi-bit ECC engine that detects and corrects an error from the second data.