Flash Memory Error Correction Unit Self-Test Circuit
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Solution Overview
Problem
Flash memory devices face challenges in accurately reading data due to changes in threshold voltage distribution caused by program/erase cycles and data retention, leading to data read errors, which existing error correction methods struggle to address efficiently and cost-effectively.
Innovation Solution
An error correction code unit with an encoder, self-test circuit, and decoder is implemented in a flash memory device, allowing for the generation of error correction codes that simulate read operations to test and decode data, thereby ensuring high read and decoding quality without increasing chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction code unit is added to flash memory device, then read and decoding quality is improved, but chip area increases
Solution Approach 1:
The patent uses a pseudo-random number generator to create test data that copies the statistical characteristics of actual flash memory read data. This allows the error correction code unit to be tested with synthetic data that mimics real-world conditions without requiring actual flash memory reads, thereby reducing the need for additional hardware components and chip area while maintaining reliable error correction functionality
Solution Approach 2:
The error correction code unit is designed to perform multiple functions: it can process both actual read data from flash memory and synthetic test data generated by the pseudo-random number generator. This multi-functionality allows the same hardware circuit to be used for both normal operation and self-testing, eliminating the need for separate dedicated test hardware and reducing overall chip area
2Ease of manufacture
If self-test circuit is implemented, then manufacturing cost is reduced, but device complexity increases
Solution Approach 1:
The flash memory device performs self-testing using an integrated self-test circuit that generates test patterns, processes them through the error correction code unit, and validates the decoding functionality automatically. This self-service capability eliminates the need for external testing equipment during manufacturing, reducing manufacturing costs while the modular design of the self-test circuit keeps the added complexity manageable
Solution Approach 2:
The self-test circuit is merged with the existing error correction code unit and pseudo-random number generator, sharing common hardware resources such as the encoder, decoder, and data processing pathways. This integration approach allows the self-test functionality to be added without creating completely separate circuitry, thereby limiting the increase in device complexity while achieving cost-effective manufacturing
Data Source
AI summary
A self-test method of a flash memory device includes: generating input data; encoding the input data to generate an error correction code; utilizing the input data and the error correction code to simulate to read a page of a flash memory of the flash memory device to generate soft information; and decoding the soft information to generate a decoding result.


