Flash Memory Encoding for Multi-Level Cell Error Correction
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Solution Overview
Problem
Multi-level solid state non-volatile memories face increased errors due to reduced signal distance between voltage levels, leading to 'program disturb' and 'read disturb' issues, which affect memory performance and reliability.
Innovation Solution
A solid state non-volatile memory unit incorporating an encoder and decoder system that utilizes various error correction codes (ECC) such as Reed-Solomon, Hamming, and Turbo codes, along with modulation and demodulation techniques, to encode and decode data in a multi-level memory array, enhancing error correction capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level encoding is used to increase memory density, then storage capacity increases, but signal distance between levels decreases leading to more errors
Solution Approach 1:
The patent applies preliminary action by encoding data with error correction codes (ECC) before storing in multi-level memory cells. The encoder adds redundant bits to each data sector (e.g., 16 bytes of ECC data for 512 bytes of user data), creating a coded sequence that can tolerate errors during read operations. This pre-encoding protection allows the system to achieve high memory density through multi-level cells while maintaining data reliability despite reduced signal distance between levels.
2Quantity of substance
If more quantization levels are used per cell, then bits per cell increases, but voltage difference between adjacent levels decreases
Solution Approach 1:
The patent uses error correction codes as an intermediary mechanism between the multi-level memory cells and the data retrieval system. The ECC encoder adds redundant information that acts as a buffer, allowing the system to handle the reduced voltage separation between levels. During reading, the decoder uses this redundant information to detect and correct errors that occur due to the smaller voltage differences, enabling reliable operation with higher quantization levels (4-level, 8-level, 16-level) without requiring precise voltage separation.
3Reliability
If conventional ECC is used with multi-level memory, then error detection capability is provided, but program and read disturb errors increase
Solution Approach 1:
The patent applies parameter changes by modifying the encoding scheme specifically for multi-level memory characteristics. Instead of using conventional binary ECC approaches, the system employs ECC algorithms designed to handle the unique error patterns of multi-level cells, including program disturb and read disturb errors. The encoder transforms data into a coded sequence that accounts for the probability distribution functions of multi-level cells, and the decoder is configured to recognize and correct the specific types of errors that occur during programming and reading operations in multi-level memory.
Data Source
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AI summary
A solid state non-volatile memory unit includes, in part, an encoder, a multi-level solid state non-volatile memory array adapted to store data encoded by the encoder, and a decoder adapted to decode the data retrieved from the memory array. The memory array may be a flash EEPROM array. The memory unit optionally includes a modulator and a demodulator. The data modulated by the modulator is stored in the memory array. The demodulator demodulates the modulated data retrieved from the memory array.