Flash Memory Erase Cycle Counter Voltage Adjustment

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Solution Overview

Problem

Flash memory devices face inefficiencies in programming operations due to aging memory cells, which require repeated programming pulses and can cause program disturb effects, leading to increased programming time and reduced efficiency.

Innovation Solution

Implementing an erase cycle counter to track the number of erase operations and adjust the initial programming voltage based on the age of memory blocks, reducing the number of programming pulses needed and minimizing program disturb effects by tailoring the programming potential for each block.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If repeated programming pulses are applied to aging memory cells, then programming completeness is improved, but programming time increases and program disturb effects worsen

Engineering Contradiction:

Improveprogramming completenessVSAvoidprogramming time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by adjusting the initial programming voltage based on the erase cycle count before programming operations begin. The control circuit determines an appropriate initial voltage level that accounts for memory cell aging, allowing programming to reach completion faster without requiring multiple repeated pulses. This preliminary adjustment prevents the need for extensive repeated programming that would otherwise be necessary for aged cells.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements parameter changes by dynamically modifying the initial programming voltage parameter according to the erase cycle count. As memory blocks undergo more erase cycles and age, the system adjusts the initial programming voltage to compensate for degraded cell characteristics. This parameter adaptation enables effective programming of aged cells while reducing the number of pulses required, thereby decreasing programming time and minimizing program disturb effects on adjacent cells.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If higher programming voltages are applied to aged memory cells, then programming success is improved, but program disturb effects on adjacent cells increase

Engineering Contradiction:

Improveprogramming successVSAvoidprogram disturb effects

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by tailoring the programming voltage specifically to the needs of aged memory blocks based on their individual erase cycle counts. Rather than uniformly increasing voltage across all blocks, the system selectively adjusts the initial programming voltage only for blocks that require it due to aging. This localized approach ensures programming success for aged cells while avoiding unnecessary high-voltage applications that would cause program disturb effects on adjacent cells.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The system dynamically changes the programming voltage parameter based on the erase cycle count of each memory block. For blocks with higher erase cycle counts indicating aging, the initial programming voltage is adjusted to an appropriate level that ensures programming success. This adaptive parameter change avoids applying excessively high voltages to already-programmed or younger blocks, thereby minimizing program disturb effects while maintaining programming effectiveness for aged cells.

Inventive Principle:

Principle #35Parameter changes

3Device complexity

If standard initial programming voltage is used for all memory blocks, then device complexity is reduced, but programming efficiency decreases due to aging variations

Engineering Contradiction:

Improveprogramming control simplicityVSAvoidprogramming efficiency

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The patent implements self-service by enabling the memory device to automatically monitor its own aging state through erase cycle counting and autonomously adjust programming parameters accordingly. The control circuit within the device determines the appropriate initial programming voltage based on the stored erase cycle count, eliminating the need for external controllers to manage aging compensation. This self-adjusting mechanism maintains programming efficiency for aged cells while adding minimal complexity, as the device manages its own optimization.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent replaces complex mechanical or external control systems with an electronic sensing and adjustment mechanism. Instead of requiring external monitoring equipment or complex control logic to manage aging variations, the system uses electronic detection of erase cycle counts and automatic voltage adjustment based on predetermined thresholds. This substitution of electronic control for more complex systems achieves programming efficiency adaptation with minimal added device complexity.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8358538B2Erase cycle counter usage in a memory device

Publication Date: 2013.01.22 MICRON TECHNOLOGY INC

AI summary

Memory devices to facilitate adjustment of program voltages applied during a program operation based upon erase operation cycle counter values stored in the memory device. In one such embodiment, an erase cycle counter is maintained for each block of a memory device and is stored in the associated block of memory. Programming voltage levels utilized during program operations of memory cells are determined, at least in part, based upon the value of the erase cycle counter stored in a memory block undergoing a programming operation, for example.