Flash Memory Erase Link List for Rapid Boot-Up
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Solution Overview
Problem
The existing memory erasing methods for flash memory storage devices take a long time to execute erase commands on spare physical blocks, leading to delayed boot-up times when the device is powered on, causing users to wait before accessing the memory storage apparatus.
Innovation Solution
A memory erasing method that logically groups physical blocks into a data area and a spare area, where an erase mark is configured for each spare block, and a link list is established to prioritize and execute erase commands on selected blocks at the beginning of the list, allowing the device to enter a standby state quickly after power-on.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If erase commands are executed on all physical blocks in the spare area, then data integrity is ensured and double programming is prevented, but the time to enter standby state after power-on increases significantly
Solution Approach 1:
The spare area physical blocks are segmented into two groups: those containing valid data and those containing invalid data. The erasing operation is selectively applied only to blocks with invalid data, avoiding unnecessary operations on blocks with valid data. This segmentation resolves the contradiction by maintaining data integrity through selective erasing while reducing overall operation time.
Solution Approach 2:
Instead of executing erase commands on all spare area blocks (excessive action), the patent applies erasing only to the subset of blocks that actually contain invalid data (partial action). This partial action approach prevents double programming where needed while avoiding unnecessary delays from erasing blocks that don't require it, thus reducing boot-up time without compromising data integrity.
2Reliability
If erase commands are executed on all spare physical blocks, then double programming is prevented, but the erase operation time increases
Solution Approach 1:
The patent performs a preliminary check to identify which spare area blocks contain invalid data before executing erase commands. This preliminary action (identifying invalid blocks) enables subsequent selective erasing, ensuring that double programming is prevented where necessary while avoiding unnecessary erasure operations, thus improving overall erase operation speed.
Solution Approach 2:
Different quality treatment is applied to different spare area blocks based on their data validity status. Blocks containing invalid data receive the erasing treatment (local quality action), while blocks containing valid data are left unchanged. This localized approach maintains reliability by preventing double programming on invalid blocks while preserving productivity through avoidance of redundant operations on valid blocks.
Data Source
AI summary
A memory erasing method and a memory controller and a memory storage apparatus using the same are provided. The method comprising establishing a link list according to a plurality of physical blocks of a spare area, and storing the link list into the rewritable non-volatile memory module, wherein the physical blocks of the spare area are recorded in the link list according to an arrangement order; and during every power on of the memory storage apparatus, selecting a plurality of third physical blocks among the physical blocks in the spare area according to the link list and a predetermined number, and respectively executing an erase command on the third physical blocks, wherein the third physical blocks are arranged at a beginning of the link list, and the number of the third physical blocks is the predetermined number.


