Flash Memory Page Wear Leveling Using Accumulated Erase Time

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Solution Overview

Problem

Flash memory devices have limited endurance due to specified erase/program cycles, with total erase time often being the true limitation rather than the number of cycles, leading to premature device degradation.

Innovation Solution

Implementing erase time determination and accumulation functionality to measure and store individual page erase times, allowing for optimized wear leveling by selecting pages based on accumulated erase time rather than just cycle count, thereby extending the device's useful lifetime.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If wear leveling is performed based on cycle count alone, then implementation is simple, but device lifetime is reduced due to pages with longer erase times being overused

Engineering Contradiction:
Improveimplementation simplicityVSAvoiddevice lifetime
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the wear leveling parameter from cycle count to accumulated erase time. The controller measures actual erase time for each page and uses this time-based metric for wear leveling decisions, allowing pages with shorter erase times to be used more frequently while protecting pages with longer erase times, thereby extending overall device lifetime

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the simple cycle-counting mechanism with a time-measurement mechanism. By introducing erase time determination functionality that measures actual erase duration and accumulates this time, the system substitutes a more sophisticated time-based approach for the crude cycle-counting method, achieving better reliability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If conservative guard bands are used for erase time, then reliability is ensured, but device lifetime is reduced due to excessive erase time allocation

Engineering Contradiction:
Improveerase operation reliabilityVSAvoiddevice lifetime
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent implements feedback by measuring actual erase time for each page and using this measured information to adjust wear leveling decisions. The controller receives feedback on real erase durations and dynamically allocates page usage based on accumulated erase time, replacing conservative static guard bands with adaptive time-based management that extends device lifetime while maintaining reliability

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent transitions from static conservative guard bands to dynamic time-based allocation. By continuously measuring erase times and updating accumulated erase time for each page, the system dynamically adjusts which pages are suitable for use, optimizing the balance between reliability and device lifetime

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If all pages are treated equally in wear leveling, then management is simple, but efficiency is reduced due to ignoring individual page erase time variations

Engineering Contradiction:
Improvepage management simplicityVSAvoiddevice utilization efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent applies local quality by treating each page individually based on its specific erase time characteristics. Instead of uniform treatment, the controller measures and accumulates erase time for each page separately, allowing pages with shorter erase times to be preferentially selected for writing, thereby improving overall device utilization efficiency while maintaining manageable complexity

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10496289B2System and methods for increasing useful lifetime of a flash memory device
Publication Date: 2019.12.03 NUVOTON
  • US10496289B2 patent drawing
  • US10496289B2 patent drawing

AI summary

A system for improving utilization of a nonvolatile flash memory device which has pages whose guaranteed per-cycle erase time and guaranteed number of cycles are known, the system comprising erase time determination functionality for individual pages; de-facto total erase-time accumulation functionality incrementing, for each erase cycle to which an individual page is subjected, by the individual page's de facto erase time per cycle as provided by the erase time measurement functionality; and flash memory page usage monitoring functionality operative to control usage of pages in flash memory including selecting at least one individual flash memory page depending on a comparison between the individual flash memory page's de facto total erase time and a guaranteed erase time computed as a product of the guaranteed per-cycle erase time and of the guaranteed number of cycles.