Flash Memory Erase Verify Voltage Adjustment for Wear Reduction
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Solution Overview
Problem
As the number of program-erase (P/E) cycles increases in flash memory devices, the threshold voltage of memory cells shifts, leading to accelerated wear and reduced memory life due to the need for increased bias voltage during erasing operations.
Innovation Solution
A non-volatile memory device and erasing operation method that monitor the current threshold voltage of memory cells, calculate the voltage shift relative to the original threshold voltage, and adjust the erase verify voltage level to prevent additional bias voltage application, thereby maintaining memory cell integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the bias voltage is increased to compensate for threshold voltage shift after multiple P/E cycles, then the erasing operation can be maintained, but the wear of the flash memory accelerates and memory life decreases
Solution Approach 1:
The patent changes the verify voltage parameter dynamically based on the number of P/E cycles. Instead of using a fixed verify voltage, the system adjusts the verify voltage level according to the threshold voltage shift that occurs with aging, allowing erasing operation to be maintained without increasing bias voltage, thus resolving the contradiction between erasing reliability and memory life
Solution Approach 2:
The patent implements a feedback mechanism where the threshold voltage shift is monitored and used to adjust the verify voltage for subsequent erasing operations. This closed-loop control ensures that the erasing operation remains effective while avoiding the harmful effect of increased bias voltage on memory cell wear
2Productivity
If the bias voltage is increased to compensate for threshold voltage shift, then the erasing operation can be completed, but additional wear is caused to the memory cell
Solution Approach 1:
The patent modifies the verify voltage parameter based on the cumulative P/E cycle count and observed threshold voltage shift. By dynamically adjusting this parameter, the system ensures complete erasing operation while avoiding the application of excessive bias voltage that would cause additional memory cell wear
Data Source
AI summary
A non-volatile memory device and an erasing operation method thereof are provided. The non-volatile memory device includes a main memory cell region and a control circuit electrically connected to the main memory cell region. The main memory cell region has a plurality of memory cells. The control circuit is configured to perform an erasing operation on the memory cells, wherein the control circuit is configured to: obtain a current threshold voltage of the memory cell to be erased; calculate a difference between the current threshold voltage and an original threshold voltage to obtain a voltage shift value, wherein the original threshold voltage represents the pre-delivery threshold voltage of the memory cells; adjust an erase verify voltage level according to the voltage shift value; and determine whether the erasing operation is completed according to the adjusted erase verify voltage level.