Flash Memory Erased Page Detection Using ECC and EDC Verification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory systems face challenges in identifying and managing erased pages within blocks, particularly due to low host writing activity or power cycles, which can leave some pages in an unprogrammed state, necessitating a robust method to determine the last programmed page.
Innovation Solution
A method involving a data storage system with ECC and EDC decoders is used to scan for erased pages by decoding a codeword from each page and verifying the decoded data, where a successful decode with all bits as '1' indicates an erased state, and failure to verify signifies a programmed state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single decoder is used to read codewords from flash memory pages, then the device complexity is reduced, but the measurement precision of page state identification deteriorates
Solution Approach 1:
The patent divides the decoding function into two separate decoders: a first decoder for initial codeword decoding and a second decoder for verification. This segmentation allows each decoder to specialize in its specific function, with the first decoder attempting to decode the codeword and the second decoder verifying the decoded data against the original codeword, thereby improving measurement precision while maintaining manageable device complexity through functional division.
Solution Approach 2:
The patent introduces an intermediary verification process where the first decoded data serves as a mediator between the codeword and the final state determination. The second decoder acts as an intermediary verifier that checks whether the decoded data matches the original codeword, providing an additional layer of accuracy in identifying erased versus programmed pages without requiring a completely complex single-step decoder.
2Measurement precision
If dual decoders are configured for scanning, then the measurement precision of erased page detection is improved, but the device complexity increases
Solution Approach 1:
The patent merges the scanning and verification functions into a unified dual-decoder system where both decoders operate in coordination during the scanning process. The first decoder and second decoder are combined in a sequential workflow where the output of the first feeds into the second, allowing improved detection accuracy through combined operation while managing complexity through integrated design and shared control logic.
Solution Approach 2:
The first decoder performs preliminary decoding action on the codeword before the second decoder conducts verification. This preliminary action allows the system to quickly identify potentially erased pages through initial decoding, and only then engage the second decoder for verification, improving measurement precision while managing device complexity by staging the decoding operations rather than requiring simultaneous complex processing.
3Reliability
If all pages are scanned to identify erased states, then the reliability of memory management is improved, but the loss of time increases
Solution Approach 1:
The patent implements a skipping mechanism where pages that fail the initial decoding in the first decoder are immediately identified as programmed pages and skipped from further verification by the second decoder. This allows the system to rapidly process through pages during scanning, rushing through the verification step for obviously programmed pages while maintaining reliability by thoroughly verifying pages that pass the initial decode, thus reducing overall scanning time without sacrificing memory management accuracy.
Solution Approach 2:
The patent applies partial verification action by using the second decoder only for pages that successfully decode in the first decoder, rather than verifying all pages. This partial action approach maintains high reliability for erased page detection (by thoroughly verifying candidates) while reducing time loss by avoiding unnecessary verification of obviously programmed pages, achieving an optimal balance between reliability and scanning speed.
Data Source
AI summary
The subject technology provides for scanning blocks of a flash memory device for erased pages. A first codeword read from a page of a block in a flash memory device is received and provided to a first decoder for decoding. In response to receiving a first success indicator from the first decoder indicating that the first codeword was successfully decoded, first decoded data is provided from the first decoder to a second decoder for verification of the first decoded data. In response to receiving a first failure indicator from the second decoder indicating that the first decoded data was not verified, the page of the block is identified as being in an erased state based on the first success indicator received from the first decoder and the first failure indicator received from the second decoder.