Flash Memory Erasing Method with Multi-Threshold Verification

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Solution Overview

Problem

Existing methods for erasing flash memory are time-consuming and inefficient, leading to low erasing efficiency and potential cell leakage issues.

Innovation Solution

An erasing method and module that determine whether a memory passes multiple verification operations based on different thresholds, generating erasing pulses of varying sizes to perform erasing operations and correct over-erase conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If existing erasing method is used, then erasing operation can be performed, but erasing speed is slow and efficiency is low

Engineering Contradiction:
Improveerasing efficiencyVSAvoiderasing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The erasing process is divided into multiple verification operations (first erasing verification and second erasing verification) with different thresholds. The memory is processed in segments through multiple passes, with each pass performing verification and conditional erasing. This segmentation allows the system to quickly identify and erase only the portions that need it, rather than erasing the entire memory uniformly, thereby improving erasing efficiency and reducing time loss.

Inventive Principle:
Principle #1Segmentation

2Reliability

If existing erasing method is used, then erasing operation can be performed, but cell leakage occurs

Engineering Contradiction:
Improvememory reliabilityVSAvoidcell leakage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent performs a first erasing verification operation before the actual erasing operation to identify which memory portions need erasing. This preliminary verification action prevents unnecessary erasing of already clean cells, thereby preventing cell leakage. The system only generates erasing pulses for portions that fail the verification, ensuring reliable and safe erasing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the results of erasing verification operations are used to control subsequent erasing operations. The verification thresholds provide feedback information about the memory state, and this feedback determines whether erasing pulses should be generated. This closed-loop control ensures that erasing is performed only when necessary, improving memory reliability and preventing cell leakage.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If multiple verification operations are performed, then erasing precision is improved, but device complexity increases

Engineering Contradiction:
Improveerasing verification precisionVSAvoiderasing module complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses different verification thresholds for different verification operations (first threshold for first verification, second threshold for second verification). By changing the parameter (threshold) according to the verification stage, the system achieves high precision in identifying which cells need erasing without requiring complex additional hardware. The parameter change approach maintains simplicity while improving verification precision.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12308076B2Memory device and erasing method thereof
Publication Date: 2025.05.20 WINBOND ELECTRONICS CORP
  • US12308076B2 patent drawing
  • US12308076B2 patent drawing
  • US12308076B2 patent drawing

AI summary

An erasing method of a memory device includes the following steps. It is determined whether a memory passes the first erasing verification operation according to the first erasing verification threshold. When the memory does not pass the first erasing verification operation, an erasing operation is performed on the memory. When the memory passes the first erasing verification operation, a flag is generated and it is determined whether the memory passes a second erasing verification operation according to the second erasing verification threshold. When the memory does not pass the second erasing verification operation, the erasing operation is performed on the memory. When the memory passes the second erasing verification operation, an over-erase correction is performed on the memory. It is determined whether there is a flag indicating that all addresses pass the first erasing verification to determine whether the memory passes the first or second erasing verification operation.