Flash Memory Components Using Etching Precision

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Solution Overview

Problem

The challenge in increasing the density of flash memory devices lies in forming straight and uniform holes through multiple layers of material, which is complicated by the need for similar etching properties in conductive materials, affecting the formation of vertical NAND strings in three-dimensional memory arrays.

Innovation Solution

The solution involves using alternating layers of materials with similar etching properties, such as polysilicon and SiGe, where the removal of one material creates voids between word lines, acting as electrical insulators, to facilitate the formation of vertical conductive channels and memory cells, improving etching precision and reducing capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If alternating layers of materials with similar etching properties are used, then etching precision is improved and straight uniform holes can be formed through multiple layers, but device complexity increases due to the need for multiple material layers and selective removal processes

Engineering Contradiction:
Improveetching precisionVSAvoiddevice complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the conductive material into alternating layers (first conductive material layers and second conductive material layers) with similar etching properties. This segmentation allows selective removal of specific layers to form voids between word lines while maintaining straight and uniform hole formation through the stacked structure, directly resolving the etching precision challenge.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different materials (first conductive material vs. second conductive material) at different locations within the stacked structure. The first conductive material layers form word lines while the second conductive material layers are selectively removed to create voids. This local differentiation enables precise control over where voids form, improving etching precision without requiring complete restructuring of the device.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If voids are created between word lines by removing conductive material layers, then capacitance between word lines is reduced improving power efficiency, but manufacturing complexity increases due to selective material removal processes

Engineering Contradiction:
Improvepower efficiencyVSAvoidease of manufacture
Core Design Contradiction:
Use of energy by moving objectVSEase of manufacture

Solution Approach 1:

The patent extracts (removes) the second conductive material layers from the stacked structure through selective etching processes. This extraction creates voids between the first conductive material layers (word lines), reducing parasitic capacitance and improving power efficiency. The selective removal is enabled by using materials with similar etching properties that respond differently to the etching process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the physical and chemical parameters of the conductive material layers by selecting materials with similar etching properties (e.g., polysilicon and silicon-germanium alloys with comparable germanium content). This parameter matching enables selective removal of specific layers while maintaining the integrity of adjacent layers, making the manufacturing process more controllable despite the added complexity.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If multiple conductive layers are stacked vertically to increase memory density, then storage capacity is improved, but forming straight holes through multiple layers becomes more difficult

Engineering Contradiction:
Improvememory densityVSAvoidhole formation precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent performs preliminary actions by forming the alternating conductive material layers with similar etching properties before creating the vertical holes. This preliminary structuring ensures that when etching occurs, the similar etching rates of adjacent layers work together to maintain straight and uniform hole profiles through the entire stacked structure, enabling high memory density without sacrificing hole formation precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates homogeneity in the etching properties of adjacent conductive material layers by selecting materials with similar characteristics (e.g., polysilicon and silicon-germanium with comparable germanium content ranging from 5-50%). This homogeneity ensures uniform etching behavior across all layers, allowing straight hole formation through multiple stacked layers and enabling increased memory density.

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentUS11322508B2Flash memory components and methods
Publication Date: 2022.05.03 INTEL NDTM US LLC
  • US11322508B2 patent drawing
  • US11322508B2 patent drawing
  • US11322508B2 patent drawing

AI summary

Flash memory technology is disclosed. In one example, a flash memory component can include a plurality of conductive layers vertically spaced apart from one another and separated by voids, each of the plurality of conductive layers forming a word line. The memory component can also include a vertically oriented conductive channel extending through the plurality of conductive layers. In addition, the flash memory component can include a plurality of memory cells coupling the plurality of conductive layers to the conductive channel. Each word line can be associated with one of the plurality of memory cells. Associated devices, systems, and methods are also disclosed.