Dynamic Reference Current Adjustment for Flash Memory Fail Bit Sensing
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Solution Overview
Problem
In flash memory apparatuses, variations in memory cell current due to manufacturing and usage conditions lead to inaccuracies in fail bit sensing, causing errors in determining the number of fail bits that can be corrected by error correction algorithms, which affects programming efficiency and time.
Innovation Solution
A nonvolatile memory apparatus with a fail bit sensing unit that adjusts the reference current or read current based on deviations in memory cell current, using a controller to generate signals for varying the current amounts during verification operations, ensuring precise fail bit counting and error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed reference current is used for fail bit sensing, then the sensing process is simple, but measurement precision deteriorates due to current deviations in memory cells
Solution Approach 1:
The reference current is made dynamic by adjusting it according to the number of fail bits detected. The controller modifies the reference current value based on feedback from the fail bit sensing unit, allowing the system to adapt to varying current deviations in memory cells and maintain accurate fail bit detection across different operating conditions
Solution Approach 2:
The system implements feedback by using the fail bit sensing unit to detect current deviations and feed this information back to the controller, which then adjusts the reference current accordingly. This closed-loop mechanism ensures that the reference current continuously adapts to match the actual current characteristics of the memory cells being tested
2Reliability
If program operation is performed until all memory cells are completely programmed, then programming completeness is ensured, but productivity deteriorates due to unnecessary programming operations
Solution Approach 1:
The system replaces the traditional mechanical approach of programming all cells sequentially with an optimized process that uses fail bit sensing to identify and skip already-programmed cells. The controller uses the sensing feedback to determine which cells require programming and which do not, substituting the exhaustive programming approach with a targeted selection method that maintains reliability while improving efficiency
3Loss of time
If fail bit sensing is performed without current adjustment, then the process is fast, but measurement precision deteriorates due to accumulated current deviations
Solution Approach 1:
The reference current is dynamically adjusted during the sensing process based on the number of fail bits detected. This allows the system to maintain high measurement precision by adapting the reference current to the actual conditions, while the overall sensing process remains efficient through parallel processing and optimized control logic
Data Source
AI summary
A nonvolatile memory apparatus includes: a memory cell array including a plurality of unit memory cells; a page buffer unit configured to read data from a selected memory cell of the memory cell array and store the read data; a controller configured to generate a reference current generation signal, a first current control signal, and a second current control signal, which correspond to the number of fail bits to be sensed and a deviation in cell current amounts flowing through the unit memory cells during a read operation, in response to a verification command; and a fail bit sensing unit configured to receive the reference current generation signal, the first current control signal, and the second current control signal from the controller in response to the verification command, and control at least one of a reference current amount and a data read current amount of the page buffer unit.