Multi-bit Flash Memory Fast Cell Detection and Inhibit Control

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Solution Overview

Problem

In multi-bit flash memory devices, fast cells accumulate charge at higher rates than normal cells, leading to programming errors as they achieve higher threshold voltages than intended, which burdens error correction processes due to incorrect programming of these cells.

Innovation Solution

Implementing a preliminary verify read operation before each program operation to detect fast cells that have already reached target threshold states and setting them to a program-inhibit status to prevent further unintended programming, ensuring only non-program-inhibited cells are further programmed to achieve target voltage states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If charge is injected into floating gates for a given duration to program memory cells, then normal cells achieve target threshold voltages, but fast cells accumulate charge at higher rates and reach higher threshold voltages than intended, causing programming errors

Engineering Contradiction:
Improveprogramming speedVSAvoidprogramming accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs a preliminary verify read operation before the actual program operation to detect fast cells that have already reached their target threshold states. By identifying these cells in advance and setting them to program-inhibit status, the system prevents them from receiving additional charge during the subsequent program operation, thereby avoiding programming errors while maintaining efficient programming speeds for normal cells

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If a verify read operation is performed after program operations to detect programming errors, then fast cell errors can be identified, but the error correction load increases and reliability decreases

Engineering Contradiction:
Improveerror detection capabilityVSAvoiderror correction load
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent performs a preliminary verify read operation before the program operation to detect fast cells that have already reached their target threshold states. By setting these detected fast cells to program-inhibit status in advance, the system prevents the formation of programming errors rather than detecting and correcting them afterward. This proactive approach eliminates the need for extensive error correction, reducing the error correction load and improving overall reliability

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces or prevents 2-bit programming errors associated with fast cells, thereby decreasing the error correction load and enhancing the reliability of multi-bit flash memory devices by maintaining accurate threshold voltages.

Implementation Method 1

detecting, before a kth program operation, memory cells that already have reached target threshold voltage states

Methodology Applied
Scientific EffectThreshold voltage measurement: Electric Field

Implementation Method 2

memory cells of a flash memory device are programmed by injecting electrons into the floating gates of the transistors

Methodology Applied
Scientific EffectElectron injection: Electron Beam

Data Source

PatentUS7663914B2Method of programming a multi bit flash memory device to avoid programming errors and a device implementing the same
Publication Date: 2010.02.16 SAMSUNG ELECTRONICS CO LTD
  • US7663914B2 patent drawing
  • US7663914B2 patent drawing
  • US7663914B2 patent drawing

AI summary

A method of programming a multi bit flash memory device may perform a kth preliminary verify read operation before performing a kth program operation according to a kth page of program data, where n and k integers, n≧2, and 1≦k≦n. That is, where a (k−1)th program operation produces one or more expanded threshold voltage distribution regions due to the presence of fast cells, the kth preliminary verify read operation may detect fast cells that have already reached their target threshold states without having had to undergo the kth program operation. The kth preliminary verify read operation also may set the detected fast cells to have program-inhibit status so as to reduce or prevent undesired further programming of the detected fast cells that would otherwise occur during the kth program operation.